Patents by Inventor Dale Collins

Dale Collins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11659778
    Abstract: Methods, systems, and devices for composite electrode material chemistry are described. A memory device may include an access line, a storage element comprising chalcogenide, and an electrode coupled with the memory element and the access line. The electrode may be made of a composition of a first material doped with a second material. The second material may include a tantalum-carbon compound. In some cases, the second may be operable to be chemically inert with the storage element. The second material may include a thermally stable electrical resistivity and a lower resistance to signals communicated between the access line and the storage element across a range of operating temperatures of the storage element as compared with a resistance of the first material.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: May 23, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Pengyuan Zheng, Enrico Varesi, Lorenzo Fratin, Dale Collins, Yongjun J. Hu
  • Patent number: 11195998
    Abstract: A memory structure can include a memory cell and a first barrier layer having a maximum hydrogen diffusion coefficient of 1×10?17 cm2/s, said first barrier layer adjacent to the memory cell to minimize contaminant movement to or from the memory cell.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: December 7, 2021
    Assignee: Intel Corporation
    Inventors: Karthik Sarpatwari, Dale Collins, Anna Maria Conti, Fred Daniel Gealy, III, Andrea Gotti, Swapnil Lengade, Stephen Russell
  • Patent number: 11133461
    Abstract: Devices and systems having a diffusion barrier for limiting diffusion of a phase change material including an electrode, a phase change material electrically coupled to the electrode, and a carbon and TiN (C:TiN) diffusion barrier disposed between the electrode and the phase change material to limit diffusion of the phase change material are disclosed and described.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: September 28, 2021
    Assignee: Intel Corporation
    Inventors: Christopher Petz, Dale Collins, Tsz-Wah Chan, Swapnil Lengade, Yongjun Hu, Allen McTeer
  • Publication number: 20210249598
    Abstract: Methods, systems, and devices for composite electrode material chemistry are described. A memory device may include an access line, a storage element comprising chalcogenide, and an electrode coupled with the memory element and the access line. The electrode may be made of a composition of a first material doped with a second material. The second material may include a tantalum-carbon compound. In some cases, the second may be operable to be chemically inert with the storage element. The second material may include a thermally stable electrical resistivity and a lower resistance to signals communicated between the access line and the storage element across a range of operating temperatures of the storage element as compared with a resistance of the first material.
    Type: Application
    Filed: February 11, 2020
    Publication date: August 12, 2021
    Inventors: Pengyuan Zheng, Enrico Varesi, Lorenzo Fratin, Dale Collins, Yongjun J. Hu
  • Publication number: 20200303642
    Abstract: A memory structure can include a memory cell and a first barrier layer having a maximum hydrogen diffusion coefficient of 1×10?17 cm2/s, said first barrier layer adjacent to the memory cell to minimize contaminant movement to or from the memory cell.
    Type: Application
    Filed: June 8, 2020
    Publication date: September 24, 2020
    Inventors: Karthik Sarpatwari, Dale Collins, Anna Maria Conti, Fred Daniel Gealy, III, Andrea Gotti, Swapnil Lengade, Stephen Russell
  • Publication number: 20200203606
    Abstract: A memory structure can include a memory cell and a first barrier layer having a maximum hydrogen diffusion coefficient of 1×10?17 cm2/s, said first barrier layer adjacent to the memory cell to minimize contaminant movement to or from the memory cell.
    Type: Application
    Filed: December 21, 2018
    Publication date: June 25, 2020
    Applicant: Intel Corporation
    Inventors: Karthik Sarpatwari, Dale Collins, Anna Maria Conti, Fred Daniel Gealy, III, Andrea Gotti, Swapnil Lengade, Stephen Russell
  • Patent number: 10680175
    Abstract: A memory structure can include a memory cell and a first barrier layer having a maximum hydrogen diffusion coefficient of 1×10?17 cm2/s, said first barrier layer adjacent to the memory cell to minimize contaminant movement to or from the memory cell.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: June 9, 2020
    Assignee: Intel Corporation
    Inventors: Karthik Sarpatwari, Dale Collins, Anna Maria Conti, Fred Daniel Gealy, III, Andrea Gotti, Swapnil Lengade, Stephen Russell
  • Patent number: 10490740
    Abstract: A method of manufacture of a non-volatile memory system comprising: forming a dielectric layer having a hole; depositing a first electrode in the hole of the dielectric layer; applying an ion source layer over the first electrode; and depositing a second electrode over the ion source layer including: depositing an interface layer on the ion source layer, and applying a cap layer on the interface layer.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: November 26, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Shuichiro Yasuda, Dale Collins, Scott E. Sills
  • Publication number: 20170122506
    Abstract: The present invention is a high-intensity personal safety light. The personal safety light has a plurality of LEDs in a housing with a reflector. The personal safety light has an optional rechargeable battery. The personal safety light can either flash or be continuously on. The personal safety light has a motion sensor, so that, when worn, it turns on.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 4, 2017
    Inventor: Dale Collins
  • Publication number: 20160093804
    Abstract: Devices and systems having a diffusion barrier for limiting diffusion of a phase change material including an electrode, a phase change material electrically coupled to the electrode, and a carbon and TiN (C:TiN) diffusion barrier disposed between the electrode and the phase change material to limit diffusion of the phase change material are disclosed and described.
    Type: Application
    Filed: September 26, 2014
    Publication date: March 31, 2016
    Inventors: Christopher Petz, Dale Collins, Tsz-Wah Chan, Swapnil Lengade, Jeff Hu, Allen McTeer
  • Publication number: 20150041746
    Abstract: A method of manufacture of a non-volatile memory system comprising: forming a dielectric layer having a hole; depositing a first electrode in the hole of the dielectric layer; applying an ion source layer over the first electrode; and depositing a second electrode over the ion source layer including: depositing an interface layer on the ion source layer, and applying a cap layer on the interface layer.
    Type: Application
    Filed: August 9, 2013
    Publication date: February 12, 2015
    Applicant: SONY CORPORATION
    Inventors: Shuichiro Yasuda, Dale Collins, Scott E. Sills
  • Publication number: 20100003414
    Abstract: A spray box assembly including, in combination, a top spray box, a bottom spray box, the boxes being juxtapositioned to define a pathway therebetween, at least one spray assembly positioned within at least one of the boxes and a supply assembly for supplying a treating solution to the spray assembly to coat product with the treating solution as the product is fed through the pathway and also including a method of coating a product with a treating solution, comprising the steps of feeding the product into a pathway between top spray box and a bottom spray box and spraying the treating solution within at least one of the boxes about the pathway to coat the product with the treating solution as the product is fed through the pathway.
    Type: Application
    Filed: May 14, 2009
    Publication date: January 7, 2010
    Inventors: Michael E. Reed, David E. Reed, Dale Collins
  • Patent number: 7534299
    Abstract: A spray box assembly including, in combination, a top spray box, a bottom spray box, the boxes being juxtapositioned to define a pathway therebetween, at least one spray assembly positioned within at least one of the boxes and a supply assembly for supplying a treating solution to the spray assembly to coat product with the treating solution as the product is fed through the pathway and also including a method of coating a product with a treating solution, comprising the steps of feeding the product into a pathway between top spray box and a bottom spray box and spraying the treating solution within at least one of the boxes about the pathway to coat the product with the treating solution as the product is fed through the pathway.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: May 19, 2009
    Assignee: Rhino Hide LLC
    Inventors: Michael E. Reed, David E. Reed, Dale Collins
  • Publication number: 20070144628
    Abstract: The present teachings and illustrations describe a process for forming a plurality of conductive structures in or on a substrate. In one embodiment, the process comprises forming a plurality of recesses in or on the substrate, wherein the plurality of recesses include recesses having different dimensions. In addition, the process further comprises (i) forming a conductive layer which at least partially fills the plurality of recesses and (ii) treating the conductive layer to improve the conductive properties of the conductive layer. Moreover, the process still further comprises (iii) sequentially repeating acts (i) and (ii) until each of the recesses of the plurality of recesses are filled to a desired dimension and such that the conductive material in the recesses of smaller dimension are more uniformly adhered to the bottom surfaces of the recesses.
    Type: Application
    Filed: March 6, 2007
    Publication date: June 28, 2007
    Applicant: Micron Technology, Inc.
    Inventor: Dale Collins
  • Publication number: 20070048932
    Abstract: The invention includes methods of forming pluralities of electrically conductive structures. The methods can include formation of a gradient-containing material across a substrate and in direct physical contact with conductive surfaces of nodes. The gradient-containing material can consist essentially of tantalum nitride at a lowermost portion in contact with the conductive surfaces, consist essentially of tantalum at an uppermost portion, and have a TaN/Ta gradient extending between the lowermost and uppermost portions. Alternatively, the gradient-containing material can have a Co/W gradient extending therethrough. Conductive structures can be formed over the gradient-containing material. The invention also includes constructions comprising electrically conductive lines over a material having a TaN/Ta gradient, or a W/Co gradient, extending therethrough.
    Type: Application
    Filed: September 1, 2005
    Publication date: March 1, 2007
    Inventors: Dale Collins, Rita Klein, James Green
  • Publication number: 20070004197
    Abstract: Methods are provided for creating lined vias in semiconductor substrates. Using electrophoretic deposition techniques, micelles of a lining material are deposited on the wall of the via, reacting with the surface of the wall until the entire wall is covered by the lining material. The lining material is then fixed in place to form a layer lining the via. The lined via may then be filled with a desired material. For example, a via lined with an insulative material may be filled with a material such as copper to create an insulated conductive via through the substrate.
    Type: Application
    Filed: September 6, 2006
    Publication date: January 4, 2007
    Inventors: Warren Farnworth, Dale Collins, Steven McDonald
  • Publication number: 20060273448
    Abstract: Methods are provided for creating lined vias in semiconductor substrates. Using electrophoretic deposition techniques, micelles of a lining material are deposited on the wall of the via, reacting with the surface of the wall until the entire wall is covered by the lining material. The lining material is then fixed in place to form a layer lining the via. The lined via may then be filled with a desired material. For example, a via lined with an insulative material may be filled with a material such as copper to create an insulated conductive via through the substrate.
    Type: Application
    Filed: August 15, 2006
    Publication date: December 7, 2006
    Inventors: Warren Farnworth, Dale Collins, Steven McDonald
  • Publication number: 20060182879
    Abstract: Methods for forming microelectronic workpieces used in electrochemical deposition processes, methods of depositing a conductive layer on a microelectronic workpiece, and articles for electrochemical deposition in semiconductor fabrication. One aspect of the invention is directed toward methods for forming microelectronic workpieces that are well-suited for electrochemical deposition processes. On embodiment of such a method comprises depositing a first conductive material on a workpiece to form an electrically conductive first layer that conforms to the workpiece. This embodiment further includes forming a seed region defined by a second layer of a second conductive material on the first layer, and forming a contact region defined by an exposed portion of the first layer that is not covered by the second layer. The contact region can extend around at least a portion of the perimeter of the workpiece.
    Type: Application
    Filed: February 6, 2006
    Publication date: August 17, 2006
    Inventor: Dale Collins
  • Publication number: 20060063377
    Abstract: Methods for creating lined vias in semiconductor substrates. Using electrophoretic deposition techniques, micelles of a lining material are deposited on the wall of the via, reacting with the surface of the wall until the entire wall is covered by the lining material. The lining material is then fixed in place to form a layer lining the via. The lined via may then be filled with a desired material. For example, a via lined with an insulative material may be filled with a material such as copper to create an insulated conductive via through the substrate.
    Type: Application
    Filed: November 4, 2005
    Publication date: March 23, 2006
    Inventors: Warren Farnworth, Dale Collins, Steven McDonald
  • Publication number: 20060055154
    Abstract: A method and apparatus for mounting an airbag module to a vehicle, the apparatus comprising a backing plate for mounting the airbag module to the vehicle, the backing plate comprising: a plurality of elongated mounting members each being drawn from the material of the backing plate wherein the plurality of elongated mounting members are integrally formed with the backing plate and each of the plurality of elongated mounting members has a portion comprising a periphery formed from the material of the backing plate and an opening extending into the elongated mounting member, the opening defining the periphery of the plurality of elongated mounting members.
    Type: Application
    Filed: July 18, 2005
    Publication date: March 16, 2006
    Inventors: John Salmon, Michael Noland, Dale Collins, Charles Griever, Barry Worrell, Richard Plummer