Patents by Inventor Dale E. Dawson
Dale E. Dawson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9035704Abstract: High impedance, high frequency nanoscale device electronics configured to interface with low impedance loads include an impedance transforming stage constructed of multiple nanoscale devices, such as carbon nanotube field-effect transistors. In an embodiment of the present invention, an impedance transforming output stage of a multistage amplifier is configured to drive a 50 ohm transmission line with unity voltage gain using multiple carbon nanotube field-effect transistors in parallel. In a further embodiment, a receiver provided for an electronically steered receive array is a monolithic, lumped-element system formed from nanoscale devices and configured to interface with the external electrical systems via a single transmission line.Type: GrantFiled: October 1, 2010Date of Patent: May 19, 2015Assignee: Northrop Grumman Systems CorporationInventors: Aaron A. Pesetski, Hong Z. Pesetski, James E. Baumgardner, II, Dale E. Dawson
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Patent number: 8559906Abstract: An embodiment of a system and method provides a carbon nanotube transistor (CNT) mixer with a low local oscillator power requirement and no inter-modulation products. Specifically, an embodiment of the system and method provides two kinds of device current-voltage (I-V) characteristics on the same integrated circuit: exponential and linear. The CNT I-V characteristics support both the ideal exponential control characteristic (determined by physics constants) and the ideal linear control characteristic (also determined by physics constants), resulting in an ideal multiplier. In other words, the CNT mixer is mathematically equivalent to an ideal multiplier. Such an ideal multiplier can be used as a mixer with low local oscillator power requirement and virtually no inter-modulation products.Type: GrantFiled: June 24, 2011Date of Patent: October 15, 2013Assignee: Northrop Grumman Systems CorporationInventors: Dale E. Dawson, John X. Przybysz, Maaz Aziz
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Publication number: 20120326763Abstract: An embodiment of a system and method provides a carbon nanotube transistor (CNT) mixer with a low local oscillator power requirement and no inter-modulation products. Specifically, an embodiment of the system and method provides two kinds of device current-voltage (I-V) characteristics on the same integrated circuit: exponential and linear. The CNT I-V characteristics support both the ideal exponential control characteristic (determined by physics constants) and the ideal linear control characteristic (also determined by physics constants), resulting in an ideal multiplier. In other words, the CNT mixer is mathematically equivalent to an ideal multiplier. Such an ideal multiplier can be used as a mixer with low local oscillator power requirement and virtually no inter-modulation products.Type: ApplicationFiled: June 24, 2011Publication date: December 27, 2012Applicant: Northrop Grumman Systems CorporationInventors: Dale E. Dawson, John X. Przybysz, Maaz Aziz
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Publication number: 20120081184Abstract: High impedance, high frequency nanoscale device electronics configured to interface with low impedance loads include an impedance transforming stage constructed of multiple nanoscale devices, such as carbon nanotube field-effect transistors. In an embodiment of the present invention, an impedance transforming output stage of a multistage amplifier is configured to drive a 50 ohm transmission line with unity voltage gain using multiple carbon nanotube field-effect transistors in parallel. In a further embodiment, a receiver provided for an electronically steered receive array is a monolithic, lumped-element system formed from nanoscale devices and configured to interface with the external electrical systems via a single transmission line.Type: ApplicationFiled: October 1, 2010Publication date: April 5, 2012Applicant: Northrop Grumman Systems CorporationInventors: Aaron A. PESETSKI, Hong Z. Pesetski, James E. Baumgardner, II, Dale E. Dawson
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Patent number: 8043965Abstract: A method is provided for forming a through substrate via in a compound semiconductor having a transistor on a front side of the substrate. The method comprises forming a protective stop pad over a contact area on the front side of the substrate, forming a contact pad overlying the protective stop pad, such that the contact pad is in contact with a terminal of the transistor and plasma etching a backside of the substrate to form a contact coupling via to the protective stop pad. The method further comprises performing a chemical wet etch to remove the protective stop pad and depositing a conductive contact layer in the contact coupling via to provide a conductive contact to the contact pad.Type: GrantFiled: February 11, 2009Date of Patent: October 25, 2011Assignee: Northrop Grumann Systems CorporationInventors: Harlan C. Cramer, Dale E. Dawson
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Publication number: 20100203726Abstract: A method is provided for forming a through substrate via in a compound semiconductor having a transistor on a front side of the substrate. The method comprises forming a protective stop pad over a contact area on the front side of the substrate, forming a contact pad overlying the protective stop pad, such that the contact pad is in contact with a terminal of the transistor and plasma etching a backside of the substrate to form a contact coupling via to the protective stop pad. The method further comprises performing a chemical wet etch to remove the protective stop pad and depositing a conductive contact layer in the contact coupling via to provide a conductive contact to the contact pad.Type: ApplicationFiled: February 11, 2009Publication date: August 12, 2010Inventors: Harlan C. Cramer, Dale E. Dawson
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Patent number: 5351163Abstract: A high Q monolithic metal-insulator-metal (MIM) capacitor utilizing a single crystal dielectric material. A dielectric membrane is epitaxially grown on a substrate. The membrane acts as an etch-stop when a backside etch is used to form a cavity in the substrate, resulting in a single crystal dielectric membrane spanning the cavity. Electrodes are formed on opposite surfaces of the membrane at the cavity location. For a shunt capacitor application, the bottom electrode is connected to the backside substrate metallization. For a series capacitor application, the bottom electrode is isolated from the backside metallization, but is connected to the topside circuitry through a via formed in the membrane. The membrane may consist of two dielectric layers, where the first layer is an etchstop material. In one embodiment the substrate and second dielectric layer are gallium arsenide and the first dielectric layer is aluminum gallium arsenide.Type: GrantFiled: December 30, 1992Date of Patent: September 27, 1994Assignee: Westinghouse Electric CorporationInventors: Dale E. Dawson, Albert A. Burk, Jr., Harlan C. Cramer, Ronald C. Brooks, Howell G. Henry
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Patent number: 5252842Abstract: A semiconductor device has material removed from the back of the substrate and a manufacturing process is provided for manufacturing these devices. In the exemplary embodiment, a GaAs FET chip is formed by a process including the step of etching the GaAs substrate from the back of the chip in a defined removal region to reduce the dielectric constant in the region of the source-to-drain path. A buffer layer of differing material provided between the active layers and the substrate prevents etching of the active layers during the removal process. To allow simplified etching patterns, the source-to-drain path may be laid out on the surface of the chip in a variety of patterns, including "packed" patterns concentrating a large path area in a small surface area of the chip. Optionally, this buffer layer may also be etched away in a further processing step.Type: GrantFiled: July 26, 1991Date of Patent: October 12, 1993Assignee: Westinghouse Electric Corp.Inventors: Daniel C. Buck, James E. Degenford, Soong H. Lee, Scott A. Imhoff, Dale E. Dawson
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Patent number: 5194836Abstract: A miniature thin film microwave frequency acoustic filter device comprising acoustic resonators formed on the same dielectric membrane so that their frequency responses are identical. Because the filters are miniature, they can be manifolded without manifolding circuitry that normally causes significant filter losses.Type: GrantFiled: August 20, 1991Date of Patent: March 16, 1993Assignee: Westinghouse Electric Corp.Inventors: Christopher R. Vale, Dale E. Dawson, David M. Krafcsik
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Patent number: 4951123Abstract: The invention is an improved integrated circuit chip assembly which provides enhanced heat transfer from active electronic devices of the integrated circuit by significantly reducing the thickness of the substrate and providing the necessary structural support through a thermally conducting spacing segment between the substrate and a ground plane in the region of the active electronic devices. This improvement further permits added flexibility in the design of transmission lines by permitting adjustment of the distance between the transmission line and the ground plane and furthermore by permitting the introduction of a second dielectric material such that the impedance of the transmission line may be controlled.Type: GrantFiled: September 30, 1988Date of Patent: August 21, 1990Assignee: Westinghouse Electric Corp.Inventors: Soong H. Lee, Chun L. Lau, Daniel C. Buck, Dale E. Dawson
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Patent number: 4638269Abstract: A reflective hybrid analog phase shifter is detailed which is operable in the X-band, and which exhibits minimal phase shift variation with higher power loadings. A pair of back-to-back connected Schottky varactor diodes are serially connected to each of the phase shifting ports of a 3 dB coupler. The Scottky varactor diodes are reverse biased to permit continuous variation of the phase shift as a function of analog bias potential. A monolithically fabricated implementation of this circuit design is detailed.Type: GrantFiled: May 28, 1985Date of Patent: January 20, 1987Assignee: Westinghouse Electric Corp.Inventors: Dale E. Dawson, Anthony L. Conti, Soong H. Lee, Gary F. Shade, Lawrence E. Dickens