Patents by Inventor Dale L. Kirkland
Dale L. Kirkland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9448935Abstract: Techniques are disclosed for performing memory access operations. A texture unit receives a memory access operation that includes a tuple associated with a first view in a plurality of views. The texture unit retrieves a first hash value associated with a first texture header in a plurality of texture headers, where the first texture header is related to the first view. The texture unit retrieves a second hash value associated with a second texture header in the plurality of texture headers, where the second texture header is related to a second view. The texture unit determines whether the first view is potentially aliased with the second view, based on the first and second hash values. If so, then the texture unit invalidates a cache entry in a cache memory associated with the second texture header. Otherwise, the texture unit maintains the cache entry.Type: GrantFiled: September 25, 2013Date of Patent: September 20, 2016Assignee: NVIDIA CorporationInventors: Jeff Bolz, Patrick R. Brown, Steven J. Heinrich, Dale L. Kirkland, Joel McCormack
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Patent number: 9436969Abstract: One embodiment of the present invention sets forth a technique for redistributing geometric primitives generated by tessellation and geometry shaders for processing by multiple graphics pipelines. Geometric primitives that are generated in a first processing cycle are collected and redistributed more evenly and in smaller tasks to the multiple graphics pipelines for vertex processing in a second processing cycle. The smaller tasks do not exceed the resource limits of a graphics pipeline and the per-vertex processing workloads of the graphics pipelines in the second cycle are balanced and make full use of resources. Therefore, the performance of the tessellation and geometry shaders is improved.Type: GrantFiled: August 11, 2011Date of Patent: September 6, 2016Assignee: NVIDIA CorporationInventors: Ziyad S. Hakura, Emmett M. Kilgariff, Dale L. Kirkland, Johnny S. Rhoades, Cynthia Ann Edgeworth Allison, Karim M. Abdalla
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Patent number: 9342311Abstract: One embodiment of the present invention includes a method for generating accumulated bounding boxes for graphics primitives. The method includes generating a first bounding box associated with a first graphics primitive. The method further includes, for each graphics primitive included in a first set of one or more additional graphics primitives, determining that the graphics primitive is within a threshold distance of the first bounding box, and adding the graphics primitive to the first bounding box. The method further includes determining not to add a second graphics primitive to the first bounding box. The method further includes generating a second bounding box associated with the second graphics primitive. Finally, the method includes transmitting the first bounding box to a tiling unit via a crossbar. One advantage of the disclosed embodiments is that multiple bounding boxes are combined to generate an accumulated bounding box that is then transferred across the crossbar.Type: GrantFiled: August 14, 2013Date of Patent: May 17, 2016Assignee: NVIDIA CorporationInventors: Ziyad S. Hakura, Pierre Souillot, Cynthia Allison, Dale L. Kirkland, Rouslan Dimitrov
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Patent number: 9336002Abstract: One embodiment of the present invention includes a method for performing a multi-pass tiling test. The method includes combining a plurality of bounding boxes to generate a coarse bounding box. The method further includes identifying a first cache tile associated with a render surface and determining that the coarse bounding box intersects the first cache tile. The method further includes comparing each bounding box included in the plurality of bounding boxes against the first cache tile to determine that a first set of one or more bounding boxes included in the plurality of bounding boxes intersects the first cache tile. Finally, the method includes, for each bounding box included in the first set of one or more bounding boxes, processing one or more graphics primitives associated with the bounding box. One advantage of the disclosed technique is that the number of intersection calculations performed for each cache tile is reduced.Type: GrantFiled: August 14, 2013Date of Patent: May 10, 2016Assignee: NVIDIA CorporationInventors: Ziyad S. Hakura, Pierre Souillot, Cynthia Allison, Dale L. Kirkland
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Patent number: 9286659Abstract: A system, method, and computer program product are provided for multi-sample processing. The multi-sample pixel data is received and is analyzed to identify subsets of samples of a multi-sample pixel that have equal data, such that data for one sample in a subset represents multi-sample pixel data for all samples in the subset. An encoding state is generated that indicates which samples of the multi-sample pixel are included in each one of the subsets.Type: GrantFiled: March 15, 2013Date of Patent: March 15, 2016Assignee: NVIDIA CorporationInventors: Alexander Lev Minkin, Henry Packard Moreton, Yury Uralsky, Eric Brian Lum, Dale L. Kirkland, Steven James Heinrich, Rui Manuel Bastos, Emmett M. Kilgariff, Jeffrey Alan Bolz, Tyson Bergland, Patrick R. Brown
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Patent number: 9269179Abstract: A system, method, and computer program product are provided for generating primitive-specific attributes. In operation, it is determined whether a portion of a graphics processor is operating in a predetermined mode. If it is determined that the portion of the graphics processor is operating in the predetermined mode, only one or more primitive-specific attributes are generated in association with a primitive.Type: GrantFiled: March 15, 2013Date of Patent: February 23, 2016Assignee: NVIDIA CorporationInventors: Ziyad Sami Hakura, Yury Uralsky, Tyson Bergland, Dale L. Kirkland, Cyril Jean-Francois Crassin, Henry Packard Moreton
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Patent number: 9262797Abstract: A system, method, and computer program product are provided for multi-sample processing. The multi-sample pixel data is received and an encoding state associated with the multi-sample pixel data is determined. Data for one sample of a multi-sample pixel and the encoding state are provided to a processing unit. The one sample of the multi-sample pixel is processed by the processing unit to generate processed data for the one sample that represents processed multi-sample pixel data for all samples of the multi-sample pixel or two or more samples of the multi-sample pixel.Type: GrantFiled: March 15, 2013Date of Patent: February 16, 2016Assignee: NVIDIA CorporationInventors: Alexander Lev Minkin, Henry Packard Moreton, Yury Uralsky, Eric Brian Lum, Dale L. Kirkland, Steven James Heinrich, Rui Manuel Bastos, Emmett M. Kilgariff, Jeffrey Alan Bolz, Tyson Bergland, Patrick R. Brown
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Patent number: 9183609Abstract: A technique for efficiently rendering content reduces each complex blend mode to a series of basic blend operations. The series of basic blend operations are executed within a recirculating pipeline until a final blended value is computed. The recirculating pipeline is positioned within a color raster operations unit of a graphics processing unit for efficient access to image buffer data.Type: GrantFiled: December 20, 2012Date of Patent: November 10, 2015Assignee: NVIDIA CorporationInventors: Rui Bastos, Mark J. Kilgard, William Craig McKnight, Jerome F. Duluk, Jr., Pierre Souillot, Dale L. Kirkland, Christian Amsinck, Joseph Detmer, Christian Rouet, Don Bittel
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Patent number: 9142040Abstract: A system, method, and computer program product are provided for processing graphics data associated with shading. In operation, a first fragment is received. Further, the first fragment is shaded. While the first fragment is being shaded, a second fragment is received and it is determined whether at least one aspect of the second fragment conflicts with the first fragment. If it is determined that the at least one aspect of the second fragment does not conflict with the first fragment, the second fragment is shaded. If it is determined that the at least one aspect of the second fragment conflicts with the first fragment, information associated with the second fragment is stored, a third fragment is received, and the third fragment is shaded, if it is determined that at least one aspect of the third fragment does not conflict with the first fragment.Type: GrantFiled: March 15, 2013Date of Patent: September 22, 2015Assignee: NVIDIA CorporationInventors: Emmett M. Kilgariff, Tyson Bergland, Dale L. Kirkland, Rui Manuel Bastos, Christian Jean Rouet
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Publication number: 20150097845Abstract: One embodiment of the present invention includes a technique for processing graphics primitives in a tile-based architecture. The technique includes storing, in a buffer, a first plurality of graphics primitives and a first plurality of state bundles received from a world-space pipeline, and transmitting the first plurality of graphics primitives to a screen-space pipeline for processing while a tiling function is enabled. The technique further includes storing, in the buffer, a second plurality of graphics primitives and a second plurality of state bundles received from the world-space pipeline. The technique further includes determining, based on a first condition, that the tiling function should be disabled and that the second plurality of graphics primitives should be flushed from the buffer, and transmitting the second plurality of graphics primitives to the screen-space pipeline for processing while the tiling function is disabled.Type: ApplicationFiled: October 4, 2013Publication date: April 9, 2015Applicant: NVIDIA CORPORATIONInventors: Ziyad S. HAKURA, Cynthia Ann Edgeworth ALLISON, Joseph CAVANAUGH, Dale L. KIRKLAND, Emmett M. KILGARIFF
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Publication number: 20150089151Abstract: Techniques are disclosed for performing memory access operations. A texture unit receives a memory access operation that includes a tuple associated with a first view in a plurality of views. The texture unit retrieves a first hash value associated with a first texture header in a plurality of texture headers, where the first texture header is related to the first view. The texture unit retrieves a second hash value associated with a second texture header in the plurality of texture headers, where the second texture header is related to a second view. The texture unit determines whether the first view is potentially aliased with the second view, based on the first and second hash values. If so, then the texture unit invalidates a cache entry in a cache memory associated with the second texture header. Otherwise, the texture unit maintains the cache entry.Type: ApplicationFiled: September 25, 2013Publication date: March 26, 2015Applicant: NVIDIA CORPORATIONInventors: Jeffrey Bolz, Patrick R. BROWN, Steven J. HEINRICH, Dale L. KIRKLAND, Joel MCCORMACK
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Patent number: 8917271Abstract: One embodiment of the present invention sets forth a technique for redistributing geometric primitives generated by tessellation and geometry shaders for per-vertex by multiple graphics pipelines. Geometric primitives that are generated in a first processing stage are collected and redistributed more evenly and in smaller batches to the multiple graphics pipelines for vertex processing in a second processing stage. The smaller batches do not exceed the resource limits of a graphics pipeline and the per-vertex processing workloads of the graphics pipelines in the second stage are balanced. Therefore, the performance of the tessellation and geometry shaders is improved.Type: GrantFiled: October 4, 2010Date of Patent: December 23, 2014Assignee: NVIDIA CorporationInventors: Johnny S. Rhoades, Ziyad S. Hakura, Emmett M. Kilgariff, Dale L. Kirkland, Cynthia Ann Edgeworth Allison, Karl M. Wurstner, Karim M. Abdalla
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Publication number: 20140267315Abstract: A system, method, and computer program product are provided for multi-sample processing. The multi-sample pixel data is received and an encoding state associated with the multi-sample pixel data is determined. Data for one sample of a multi-sample pixel and the encoding state are provided to a processing unit. The one sample of the multi-sample pixel is processed by the processing unit to generate processed data for the one sample that represents processed multi-sample pixel data for all samples of the multi-sample pixel or two or more samples of the multi-sample pixel.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Applicant: NVIDIA CORPORATIONInventors: Alexander Lev Minkin, Henry Packard Moreton, Yury Uralsky, Eric Brian Lum, Dale L. Kirkland, Steven James Heinrich, Rui Manuel Bastos, Emmett M. Kilgariff, Jeffrey Alan Bolz, Tyson Bergland, Patrick R. Brown
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Publication number: 20140267356Abstract: A system, method, and computer program product are provided for multi-sample processing. The multi-sample pixel data is received and is analyzed to identify subsets of samples of a multi-sample pixel that have equal data, such that data for one sample in a subset represents multi-sample pixel data for all samples in the subset. An encoding state is generated that indicates which samples of the multi-sample pixel are included in each one of the subsets.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Applicant: NVIDIA CORPORATIONInventors: Alexander Lev Minkin, Henry Packard Moreton, Yury Uralsky, Eric Brian Lum, Dale L. Kirkland, Steven James Heinrich, Rui Manuel Bastos, Emmett M. Kilgariff, Jeffrey Alan Bolz, Tyson Bergland, Patrick R. Brown
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Publication number: 20140267355Abstract: A system, method, and computer program product are provided for processing graphics data associated with shading. In operation, a first fragment is received. Further, the first fragment is shaded. While the first fragment is being shaded, a second fragment is received and it is determined whether at least one aspect of the second fragment conflicts with the first fragment. If it is determined that the at least one aspect of the second fragment does not conflict with the first fragment, the second fragment is shaded. If it is determined that the at least one aspect of the second fragment conflicts with the first fragment, information associated with the second fragment is stored, a third fragment is received, and the third fragment is shaded, if it is determined that at least one aspect of the third fragment does not conflict with the first fragment.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Applicant: NVIDIA CORPORATIONInventors: Emmett M. Kilgariff, Tyson Bergland, Dale L. Kirkland, Rui Manuel Bastos, Christian Jean Rouet
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Publication number: 20140267276Abstract: A system, method, and computer program product are provided for generating primitive-specific attributes. In operation, it is determined whether a portion of a graphics processor is operating in a predetermined mode. If it is determined that the portion of the graphics processor is operating in the predetermined mode, only one or more primitive-specific attributes are generated in association with a primitive.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Applicant: NVIDIA CORPORATIONInventors: Ziyad Sami Hakura, Yury Uralsky, Tyson Bergland, Dale L. Kirkland, Cyril Jean-Francois Crassin, Henry Packard Moreton
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Publication number: 20140232729Abstract: Attributes of graphics objects are processed in a plurality of graphics processing pipelines. A streaming multiprocessor (SM) retrieves a first set of parameters associated with a set of graphics objects from a first set of buffers. The SM performs a first set of operations on the first set of parameters according to a first phase of processing to produce a second set of parameters stored in a second set of buffers. The SM performs a second set of operations on the second set of parameters according to a second phase of processing to produce a third set of parameters stored in a third set of buffers. One advantage of the disclosed techniques is that work is redistributed from a first phase to a second phase of graphics processing without having to copy the attributes to and retrieve the attributes from the cache or system memory, resulting in reduced power consumption.Type: ApplicationFiled: February 20, 2013Publication date: August 21, 2014Applicant: NVIDIA CORPORATIONInventors: Ziyad S. HAKURA, Dale L. KIRKLAND
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Publication number: 20140184617Abstract: One embodiment of the present invention sets forth a technique for mid-primitive execution preemption. When preemption is initiated no new instructions are issued, in-flight instructions progress to an execution unit boundary, and the execution state is unloaded from the processing pipeline. The execution units within the processing pipeline, including the coarse rasterization unit complete execution of in-flight instructions and become idle. However, rasterization of a triangle may be preempted at a coarse raster region boundary. The amount of context state to be stored is reduced because the execution units are idle. Preempting at the mid-primitive level during rasterization reduces the time from when preemption is initiated to when another process can execute because the entire triangle is not rasterized.Type: ApplicationFiled: December 27, 2012Publication date: July 3, 2014Applicant: NVIDIA CORPORATIONInventors: Gregory Scott PALMER, Ziyad S. HAKURA, Emmett M. KILGARIFF, Dale L. KIRKLAND, Lacky V. SHAH
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Publication number: 20140176568Abstract: A technique for efficiently rendering content reduces each complex blend mode to a series of basic blend operations. The series of basic blend operations are executed within a recirculating pipeline until a final blended value is computed. The recirculating pipeline is positioned within a color raster operations unit of a graphics processing unit for efficient access to image buffer data.Type: ApplicationFiled: December 20, 2012Publication date: June 26, 2014Applicant: NVIDIA CORPORATIONInventors: Rui BASTOS, Mark J. Kilgard, William Craig McKnight, Jerome F. Duluk, Pierre Souillot, Dale L. Kirkland, Christian Amsinck, Joseph Detmer, Christian Rouet, Don Bittel
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Patent number: 8760460Abstract: One embodiment of the present invention sets forth a technique for using a shared memory to store hardware-managed virtual buffers. A circular buffer is allocated within a general-purpose multi-use cache for storage of primitive attribute data rather than having a dedicated buffer for the storage of the primitive attribute data. The general-purpose multi-use cache is also configured to store other graphics data sinces the space requirement for primitive attribute data storage is highly variable, depending on the number of attributes and the size of primitives. Entries in the circular buffer are allocated as needed and released and invalidated after the primitive attribute data has been consumed. An address to the circular buffer entry is transmitted along with primitive descriptors from object-space processing to the distributed processing in screen-space.Type: GrantFiled: May 4, 2010Date of Patent: June 24, 2014Assignee: NVIDIA CorporationInventors: Emmett M. Kilgariff, Steven E. Molnar, Sean J. Treichler, Johnny S. Rhoades, Gernot Schaufler, Dale L. Kirkland, Cynthia Ann Edgeworth Allison, Karl M. Wurstner, Timothy John Purcell