Abstract: A depletion mode MOSFET and resistor are fabricated as a silicon carbide (SiC) integrated circuit (IC). The SiC IC includes a first SiC layer doped to a first conductivity type and a second SiC layer overlaid on the first SiC layer and doped to a second conductivity type. The second SiC layer includes at least four more heavily doped regions of the second conductivity type, with two of such regions comprising MOSFET source and drain electrodes and two other of such regions comprising resistor electrodes. The second SiC layer includes an isolation trench between the MOSFET electrodes and the resistor electrodes. At least two electrically conductive contacts are provided as MOSFET electrode contacts, each being positioned over at least a portion of a respective MOSFET electrode and two other electrically conductive contacts are provided as resistor electrode contacts, each being positioned over at least a portion of a respective resistor electrode.

Abstract: A silicon carbide (SiC) junction field effect transistor (JFET) device is fabricated upon a substrate layer, such as a p type conductivity SiC substrate, using ion implantation for the source and drain areas. A SiC p type conductivity layer is epitaxially grown on the substrate. A SiC n type conductivity layer is formed by ion implantation or epitaxial deposition upon the p type layer. The contacting surfaces of the p and n type layers form a junction. A p+ type gate area supported by the n type layer is formed either by the process of ion implantation or the process of depositing and patterning a second p type layer. The source and drain areas are heavily doped to n+ type conductivity by implanting donor ions in the n type layer.

Abstract: Combustion in a gas turbine is controlled through use of flame spectroscopy in order to achieve low NO.sub.x emissions in the exhaust. By monitoring the combustion flame in the turbine to determine intensity of non-infrared spectral lines, and dynamically adjusting the fuel/air ratio of the fuel mixture such that this intensity remains below a predetermined level associated with a desired low level of NO.sub.x emissions, the engine produces significantly reduced NO.sub.x emissions in its exhaust but at a sufficiently high combustion flame temperature to avoid any undue risk of flame-out, thereby assuring stable, safe and reliable operation.

Abstract: Combustion in a gas turbine is controlled through use of flame spectroscopy in order to achieve low NO.sub.x emissions in the exhaust. By monitoring the combustion flame in the turbine to determine intensity of non-infrared spectral lines, and dynamically adjusting the fuel/air ratio of the fuel mixture such that this intensity remains below a predetermined level associated with a desired low level of NO.sub.x emissions, the engine produces significantly reduced NO.sub.x emissions in its exhaust but at a sufficiently high combustion flame temperature to avoid any undue risk of flame-out, thereby assuring stable, safe and reliable operation.

Abstract: A low capacitance radiation detector comprises a monocrystalline silicon substrate heavily doped to N type conductivity with a more lightly doped N type conductivity epitaxial layer formed on the substrate. A plurality of heavily doped N type upper surface layer segments are formed in the epitaxial layer. A patterned region of the epitaxial layer, heavily doped to P type conductivity and in the shape of parallel stripes joined at each end by a respective stripe perpendicular to the parallel stripes, is formed in the epitaxial layer and situated between adjacent ones of the upper surface layer segments, with each stripe extending into the epitaxial layer deeper than, and separated from, the upper surface layer segments so as to form a minority charge carrier-collecting PN junction with the epitaxial layer.

Abstract: A battery exposed to heating from incident sunlight is cooled by rejecting heat to air drawn through a chimney by the heating of at least portions of the chimney by the incident sunlight. The battery is placed within the chimney so that the air flow in the chimney passes around the battery, enabling heat to be transferred directly from the battery to the air. Air flow in the chimney is generated by sunlight incident on the exterior of the chimney, causing heating of air within at least a portion of the chimney to create a natural convective air flow within the chimney, with relatively cool outside ambient air being drawn in at one end of the chimney and heated air being exhausted out the other end of the chimney.

Abstract: A two dimensional mosaic scintillation X-ray or Gamma ray detector has many mosaic elements. A reflecting means, e.g., an epoxy with TiO.sub.2, is disposed between the elements to reduce optical cross-talk. The elements have wide narrow ends and either the wide ends or the narrow ends can receive the incident X-rays. A photodetector is optically coupled to the remaining ends either by being directly secured thereto or by way of a lens or optical fibers. The detector has communicating wide and narrow grooves and can be made by first forming the wide grooves from a first side and then forming the narrow grooves from the second side.

Abstract: The linearity and dynamic range of a photodetector system is enhanced by providing real time cancellation of condition-dependent quiescent output signals from the photosensitive devices by provision of a condition-dependent output signal monitoring device which drives the input section of a current mirror having output sections connected to the active photosensitive devices to zero out the condition-dependent quiescent output signals of those photosensitive devices during system operation. Multiple output sections may be run from a single input section of the current mirror.

Abstract: An electrical-energy-supplying device having an extended storage life includes a finned heat sink; a battery for supplying electrical energy is thermally connected to the finned heat sink by a copper or aluminum bar for transferring heat from the battery to the heat sink. The heat sink is enclosed in a chimney structure which has an air inlet in a lower portion and an outlet in an upper portion thereof. The chimney lower portion has a heat and light absorbing coating which causes air to flow in a path between the air inlet and outlet by convention. The heat sink is positioned in the air flow path the facilitate heat dissipation from the sink to the atmosphere. The storage life of the battery may be extended by maintaining the battery temperature below a selected temperature level.

Abstract: A metal for fabricating contact structures through via openings in VLSI circuits employs a dual layer of refractory metal. A thin titanium layer is deposited, over which a molybdenum layer is formed. An annealing treatment further improves contact resistance characteristics. The method results in a contact structure which exhibits desirable properties of thermal compatibility, step coverage, contact resistance and improved processing characteristics.

Abstract: A contact metal such as tungsten, platinum silicide or palladium silicide is selectively deposited or formed on the semiconductor substrate portion of an integrated circuit chip. The metallization pattern for the circuit makes contact with the contact metal at the bottom of a contact opening or via, rather than contacting the substrate directly. Thus, the interconnection metal makes contact to the semiconductor surface through an intermediate contact metal so as to provide decreased contact resistance. This permits narrower interconnect metallization patterns so as to facilitate the construction of denser integrated circuits. In the present invention, therefore, metal framing of the contact hole is not employed.

Abstract: In order to solve the problem of the proximity effects which occurs in the fabrication of integrated circuit devices, a facile method is provided for automatically creating a new pattern in which variably spaced windage correction is applied over the mask. This permits the utilization of conventional design fabrication rules and systems without the concomitant problem of producing small feature sizes in isolated structures. The method produces highly desirable chip masks and is readily implemented on commercially available CAD systems presently being employed for the production of circuit masks. The method is automatic and extremely easily implemented.

Abstract: A conductive member consisting of a first conductor of an alloy of titanium and tungsten and a second conductor of a refractory metal such as molybdenum is sintered to a conductive member of silicon of low resistivity to form a low resistance contact therewith.

Abstract: A conductive member consisting of a first conductor of an alloy of titanium and tungsten and a second conductor of a refractory metal such as molybdenum is sintered to a conductive member of silicon to a temperature in the range of 600.degree. C. to 650.degree. C. in a reducing atmosphere to form a low resistance contact.

Abstract: A method compatible with very large scale integrated circuit fabrication processes is employed to provide an electrical connection between conductive layers separated by an insulative layer in integrated circuit devices. An intermediary metal such as molybdenum or tungsten is deposited by one or more methods so as to fill an opening in the insulative layer. A planarization resist may be applied on the substrate and the resulting configuration is planarizingly etched down to the insulative layer so as to provide a metal plug conductive layers. Deposition is by sputtering, evaporation, or by either selective or non-selective chemical vapor deposition. The process and structure provided herein significantly alleviates step coverage problems associated with aluminum and like materials which do not readily penetrate small VLSI circuit openings.

Abstract: An edge defining method is employed in the fabrication of narrow electrical patterns for VLSI circuits. The method is particularly employable in the formation of inlay MOSFET transistors having extremely narrow gate widths. The method is also particularly amenable to the fabrication of both symmetrical and non-symmetrical MOSFET devices on the same VLSI circuit chip. The inlay transistor structure is also employed to fabricate NOR and NAND type "ladder" networks and to join vertically and horizontally adjacent semiconductor devices.

Abstract: A self-aligned process is described for depositing gate electrode material in an inlay field effect transistor. The process particularly provides means for inclusion of lightly doped source and drain extensions to minimize high field effects in the channel region. The process described herein is also particularly useful for providing source and drain contact metal which also acts as an ion implantation mask layer during several of the process steps. The method described herein is usable in conventional VLSI fabrication production facilities.

Abstract: A capacitor structure which is particularly suitable for use in analog integrated circuit devices employs an intermediate layer of a refractory metal disposed in a thin layer overlying a flat dielectric surface. The thinness and the low reflectivity of the refractory metal facilitates precise patterning of the upper plate of the capacitor structure. In the present invention, capacitance is no longer determined by imprecise cuts through thick oxide layers or by patterning of thick metallization layers within these apertures. The use of refractory metals in the capacitor structure also readily permits the incorporation of resistive circuit elements.

Abstract: A transistor is formed about a recess in the planar surface of a substrate of silicon. A pair of insulating spacers is provided in the recess, each abutting a respective side of the recess. Gate oxide is formed in the recess between the insulating spacers. A gate electrode is provided having one base overlying the gate oxide and the other base substantially coplanar with the planar surface. A source region extends from one side of the channel underlying the gate oxide to the planar surface. A drain region extends from the other side of the channel underlying the gate oxide to the planar surface.

Abstract: A method of making an integrated circuit is described. The method includes providing a substrate of single crystal silicon semiconductor material having low minority carrier lifetime, forming an insulating layer of silicon dioxide overlying a major surface of the substrate, forming a plurality of apertures in the insulating layer which expose a plurality of selected portions of the major surface of the substrate, and epitaxially growing a layer of silicon on each of the selected portions of the major surfaces of the substrate.