Abstract: The present invention provides a process for forming a dopant barrier layer in a gate stack in a semiconductor device. In one advantageous embodiment, the process includes forming a gate oxide on a semiconductor substrate, forming a gate layer on the gate oxide, and forming an ultra thin (less than about 2.5 nm) silicon nitride dopant barrier layer between the gate oxide and the gate layer. The dopant barrier layer provides an excellent barrier to inhibit dopant diffusion through the gate oxide and into the p-channel during the formation of the source/drain areas. Moreover, the formation of this dopant barrier layer and the formation of the gate layer can easily be achieved in a single furnace, if so desired.

Abstract: The present invention provides the broad concept of increasing product performance and reliability by causing the ion contaminants to migrate to a region of the semiconductor film and removing that region (containing a concentration of the ion contaminants), thus reducing a total concentration of the ion contaminants in the semiconductor film. Since a concentration of ion contaminants may adversely affect performance and reliability of devices manufactured from semiconductor films having the ion contaminants, the present invention removes the ion contaminants to alleviate performance and reliability problems associated with the presence of the ion contaminants.

Abstract: A method of manufacturing a silicon substrate which optimizes extrinsic gettering during semiconductor fabrication is provided in which phosphorous ions are diffused into the backside surface of a silicon substrate during wafer slice manufacture. Forming gettering sites at the backside surface prior to gate polysilicon deposition, extrinsic gettering is optimized. Initially, both the frontside and backside surfaces of a silicon substrate are subjected to dopant materials. Thereafter, at least one thin film is formed on both the frontside and backside surfaces. The thin films are then removed from the frontside surface along with a layer of the silicon substrate immediately below the frontside surface to a depth of about 10.0 .mu.m. The final polishing step of a typical silicon wafer manufacturing process removes a layer of silicon to a depth of about 10.0 .mu.

Abstract: A method of manufacturing a silicon substrate which optimizes extrinsic gettering during semiconductor fabrication is provided in which phosphorous ions are diffused into the backside surface of a silicon substrate during wafer slice manufacture. Forming gettering sites at the backside surface prior to gate polysilicon deposition, extrinsic gettering is optimized. Initially, both the frontside and backside surfaces of a silicon substrate are subjected to dopant materials. Thereafter, at least one thin film is formed on both the frontside and backside surfaces. The thin films are then removed from the frontside surface along with a layer of the silicon substrate immediately below the frontside surface to a depth of about 10.0 .mu.m. The final polishing step of a typical silicon wafer manufacturing process removes a layer of silicon to a depth of about 10.0 .mu.

Abstract: A method for the formation of active devices upon and within exposed surfaces of both sides of a silicon wafer is presented. A dual-sided silicon wafer is provided having a first surface and an opposed second surface prepared similarly to achieve surfaces suitable for fabricating semiconductor devices. The method advantageously integrates the ability to preform wafer processing operations on both exposed surfaces separately or simultaneously. Wafer processing operations are layering, patterning, doping, and heat treatment. The processing sequence is complete when a doped region and a patterened interconnect line electrically coupled thereto (i.e., minimal integrated circuits) are formed upon and within both surfaces of the dual-sided silicon wafer. A wafer handling system and processing station for dual-sided silicon wafers are described. In addition, a technique of applying a protective layer over one surface of a dual-sided silicon wafer is also described.

Abstract: A method and device is provided for removing a thin film from a wafer backside surface. The method and device advantageously removes the thin film without using photoresist masking material or the removal of photoresist material. The thin film at the wafer backside surface is removed without affecting any thin film material on the wafer front surface. As-such, the wafer backside surface is prepared for subsequent dopant ions used for extrinsic gettering of the backside surface. Alternatively, or in addition to dopants used for backside surface gettering, polysilicon can be deposited upon the exposed backside surface to enhance extrinsic gettering properties.

Abstract: A process for the use of organic chlorides having the general formula C.sub.x H.sub.y Cl.sub.y, C.sub.z Cl.sub.s, C.sub.r O.sub.u Cl.sub.2(r-u+1), C.sub.r O.sub.u Cl.sub.r-u+1 H.sub.r-u+1, wherein x=1-10, more preferably 1-6; y=x+1, x or x-1; z=1-10, more preferably 1-6; s=2(x+1, x or x-1), r=1-10, more preferably 2-4; u=1, 2 and up to r, as precursors for decomposition to chlorine and oxygen-containing reactive reagents for subsequent use for vapor cleaning of silicon, thermal oxidation of silicon in a range of 200.degree. C.-1200.degree. C., rapid thermal oxidation of silicon and silicon polishing or etching.