Patents by Inventor Dan Agiman

Dan Agiman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6456050
    Abstract: A control voltage is generated as a function of on-time and off-time of a main regulator loop in response to apparent duty cycle of a voltage regulator circuit. Such control voltage is used in a circuit as to yield a virtual constant frequency of operation. No external compensation is required. This reduces external connections while maintaining stable, accurate, constant frequency operation of a switching voltage regulator circuit.
    Type: Grant
    Filed: November 5, 2001
    Date of Patent: September 24, 2002
    Inventor: Dan Agiman
  • Patent number: 6369557
    Abstract: The output terminal of an error amplifier (32) is coupled to the inverting input of a comparator circuit (34). Additionally, a clamp circuit is coupled between the output terminal of the error amplifier (32) and circuitry connected to the non-inverting input of the comparator circuit (34), to clamp the voltage there between to a predetermined voltage level. This circuit arrangement provides improved controller closed loop response that is adaptive to the power supply (10) output voltage.
    Type: Grant
    Filed: March 12, 2001
    Date of Patent: April 9, 2002
    Assignee: Semiconductor Components Industries LLC
    Inventor: Dan Agiman
  • Patent number: 5757173
    Abstract: A control circuit for synchronous switching power supplies employing semi-soft switching during turn off and precedent switching during turn on. During turn off, an output voltage is compared to a reference voltage to turn on a synchronous switch after a primary switch is turned off. During turn on, a timing voltage ramp triggers the turn off of the synchronous switch prior to the turn on of the primary switch.
    Type: Grant
    Filed: October 31, 1996
    Date of Patent: May 26, 1998
    Assignee: Linfinity Microelectronics, Inc.
    Inventor: Dan Agiman
  • Patent number: 5631528
    Abstract: A method for sensing motor commutation pulses during motor braking without creating negative voltages, which some junction isolated technologies substantially cannot tolerate. For instance, a commutation pulse sensing circuit containing junction isolated technology may only be able to detect commutation pulses intermittently. An H-bridge motor drive configuration is used to drive and brake a motor. High side clamp diodes are coupled between the motor terminals and a high potential source for high side braking of the motor. As an alternative to high side clamp diodes, any other suitable device may be used, including operating the pair of transistors in the upper portion of the H-bridge in an inverse mode. A commutation pulse sensing circuit is coupled to a terminal of the motor. The use of the high side brake clamp diodes avoids generating negative voltages at the motor terminals.
    Type: Grant
    Filed: May 4, 1995
    Date of Patent: May 20, 1997
    Assignee: Linfinity Microelectronics
    Inventor: Dan Agiman
  • Patent number: 5528192
    Abstract: A bi-mode circuit for driving an output load selectively couples the output load to a supply voltage source or to a low discharge voltage source such as ground using switches which are controlled by an input buffer in response to an input signal. A high input signal closes a first switch to provide a biasing current to first and second current amplifiers to turn on a first output transistor which couples the output load to the low reference voltage to discharge the output load. Conversely, a low input signal closes a second switch to provide the biasing current to a third current amplifier to turn on a second output transistor which couples the output load to the supply voltage source. When the input signal becomes high, rapid pulldown of a capacitive output load is achieved using a high internal pre-drive current provided by the first and second current amplifiers, in a first mode of operation.
    Type: Grant
    Filed: November 12, 1993
    Date of Patent: June 18, 1996
    Assignee: Linfinity Microelectronics, Inc.
    Inventor: Dan Agiman
  • Patent number: 5514977
    Abstract: A pulse detection and conditioning circuit senses and conditions commutation pulses produced by a DC permanent magnet motor to determine motor position. The pulses are sensed using a resistor coupled in series with the motor, so that motor current and the included pulses are continuously sensed, even during motor braking. The serially coupled resistor also provides for sensing and conditioning of pulses of both polarities produced by bi-directional operation of the motor. The pulse detecting and conditioning is performed by circuitry which performs amplitude qualification as well as frequency filtering to effectively detect valid commutation pulses to the exclusion of noise and other unwanted signals. Capacitors coupled to the motor and internal capacitors provide the frequency filtering, while the amplitude qualification is provided by a balanced differential gain stage coupled through an adjustable differential gain stage with adjustable gain to a unity gain comparator.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: May 7, 1996
    Assignee: Linfinity Microelectronics, Inc.
    Inventor: Dan Agiman
  • Patent number: 5471130
    Abstract: A power supply controller includes a comparator for providing a regulated voltage when an input voltage exceeds a reference voltage, so that a reference voltage is provided to drive a load discharge circuit. When the input voltage is less than the reference voltage, such as during a startup or sleep mode of operation of the controller, the load discharge circuit is driven by an output pulldown circuit so as to maintain minimum functions within the integrated circuit of the controller including turnoff of an external MOSFET. The output pulldown circuit senses the resulting absence of the regulated voltage using a first transistor coupled to be biased into nonconduction when the regulated voltage is not provided. This biases a second transistor into conduction to maintain a transistor within the load discharge circuit conductive. In this manner, the output powers its own operation, including the pulldown thereof.
    Type: Grant
    Filed: November 12, 1993
    Date of Patent: November 28, 1995
    Assignee: Linfinity Microelectronics, Inc.
    Inventor: Dan Agiman
  • Patent number: 5428287
    Abstract: An overcurrent limit circuit in which the output transistor and current sense transistor share a common collector and common base. A reference voltage is compared with a voltage derived from a current sense resistor. The circuit limits the current to the base of the output transistor in response to the reference voltage threshold being reached at the current sense resistor. A Vbe comparator comprised of two transistors may be used with a first bias current to both transistors and a second bias current to one of the two transistors.
    Type: Grant
    Filed: September 12, 1994
    Date of Patent: June 27, 1995
    Assignee: Cherry Semiconductor Corporation
    Inventor: Dan Agiman
  • Patent number: 5266884
    Abstract: A threshold controlled circuit in which hysteresis precedence is ensured by greatly enhancing the gain of the hysteresis loop with respect to the regulator control loop. The number of gain stages in the hysteresis loop exceeds the number of gain stages in the control loop. In order to ensure hysteresis precedence, the gain of the hysteresis loop times the regulator control shutdown current must exceed the gain of the control loop multiplied by the hysteresis current.
    Type: Grant
    Filed: May 4, 1992
    Date of Patent: November 30, 1993
    Assignee: Cherry Semiconductor Corporation
    Inventor: Dan Agiman
  • Patent number: 5262713
    Abstract: A technique is described for improving the sampled current accuracy in current mirror circuits such as are often used to monitor the current output to a load. A reference voltage is established to feedback the load voltage conditions at the output to the current reference circuitry, thereby greatly reducing the error in the reference current over that which is produced by prior art circuits. The technique is shown as applied to a current limiting circuit for driving an output load. An alternative embodiment is also disclosed.
    Type: Grant
    Filed: July 28, 1992
    Date of Patent: November 16, 1993
    Assignee: Texas Instruments Incorporated
    Inventor: Dan Agiman
  • Patent number: 5134358
    Abstract: A technique is described for improving the sampled current accuracy in current mirror circuits such as are often used to monitor the current output to a load. A reference voltage is established to feedback the load voltage conditions at the output to the current reference circuitry, thereby greatly reducing the error in the reference current over that which is produced by prior art circuits. The technique is shown aas applied to a current limiting circuit for driving an output load. An alternative embodiment is also disclosed.
    Type: Grant
    Filed: January 31, 1991
    Date of Patent: July 28, 1992
    Assignee: Texas Instruments Incorporated
    Inventor: Dan Agiman
  • Patent number: 5055888
    Abstract: A Zener diode structure comprising a semiconductor substrate layer of a first conductivity type, a first epitaxially formed semiconductor layer of the first conductivity type disposed on the substrate layer, a second epitaxially formed semiconductor layer of a second conductivity type disposed on the first semiconductor layer, a third semiconductor layer of the first conductivity type disposed over the second semiconductor layer, a buried layer of the first conductivity type disposed between and contacting the second and third semiconductor layers and a semiconductor contact region of the second conductivity type extending between and contacting a surface of the third semiconductor layer and the buried layer, the semiconductor contact region being an anode of a Zener diode, the buried layer being a cathode of the Zener diode.
    Type: Grant
    Filed: June 21, 1989
    Date of Patent: October 8, 1991
    Assignee: Texas Instrumenets Incorporated
    Inventor: Dan Agiman
  • Patent number: 5051612
    Abstract: A method of preventing forward biasing of PN junctions in junction isolated semiconductor devices to prevent parasitic transistor action. A biasing element is connected to the substrate/isolation regions to switch the regions to a low potential. The method is particularly well suited for implementation in the new multi-epitaxial semiconductor processes and structures.
    Type: Grant
    Filed: February 10, 1989
    Date of Patent: September 24, 1991
    Assignee: Texas Instruments Incorporated
    Inventor: Dan Agiman
  • Patent number: 4914317
    Abstract: An output load drive circuit including circuitry for adjusting a drive circuit bias current during operation in order to control driver circuit stability. The driver further includes circuitry which is self adjusting in response to ambient temperature fluctuations to control the overall gain of the driver.
    Type: Grant
    Filed: December 12, 1988
    Date of Patent: April 3, 1990
    Assignee: Texas Instruments Incorporated
    Inventor: Dan Agiman
  • Patent number: 4897594
    Abstract: Circuitry for providing unlimited, self-adjusted drive current and suitable for power applications is described. A four terminal high efficiency, high gain driver circuit including enabling circuitry is provided along with a positive feedback loop that is designed to provide unlimited drive current which automatically adjusts to the load requirement. The drive circuit includes a startup transistor, drive regulation transistors, predrive transistors, a driving or output transistor, and a current splitter. The drive regulation transistors and the current splitter provide a positive feedback loop which supplies current to the predrive transistors and the driving transistor. Under typical loading conditions, feedback loop operation will cause the collector to emitter voltage of the driving transistor to decrease which causes the drive regulation transistors to saturate. This condition decreases positive feedback loop drive which in turn regulates the predrive current to the level required by the load.
    Type: Grant
    Filed: April 6, 1989
    Date of Patent: January 30, 1990
    Assignee: Texas Instruments Incorporated
    Inventor: Dan Agiman