Abstract: This disclosure depicts an equalizer circuit having input and output terminals and a reference terminal for receiving a reference voltage. The equalizer circuit comprises a first operational amplifier which has a positive input operatively connected to the input terminal and which also has a negative input and an output. A first adjustable resistive means has a first terminal operatively connected to the negative input of the first operational amplifier a second terminal operatively connected to the output of the first operational amplifier has a reference connection operatively connected to the reference terminal and has a third terminal. A second operational amplifier has a positive input operatively connected to the third terminal of the first adjustable resistive means, has a negative input and has an output operatively connected to the output terminal.