Patents by Inventor Dan F. Greiner

Dan F. Greiner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10719415
    Abstract: Task specific diagnostic controls are provided to facilitate the debugging of certain types of abort conditions. The diagnostic controls may be set to cause transactions to be selectively aborted, allowing a transaction to drive its abort handler routine for testing purposes. The controls include, for instance, a transaction diagnostic scope and a transaction diagnostic control. The transaction diagnostic scope indicates when the transaction diagnostic control is to be applied, and the transaction diagnostic control indicates whether transactions are to selectively aborted.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: July 21, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Christian Jacobi, Timothy J. Slegel
  • Patent number: 10713048
    Abstract: An instruction to perform a conditional branch to an indirectly specified location is executed. A branch address is obtained from a location in memory, the location in memory designated by the instruction. A determination is made, based on a condition code of another instruction, whether a branch is to occur, and a branch to the branch address is performed, based on determining the branch is to occur.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: July 14, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel
  • Publication number: 20200218536
    Abstract: Selected installed function of a multi-function instruction is hidden such that even though a processor is capable of performing the hidden installed function, the availability of the hidden function is hidden such that responsive to the multi-function instruction querying the availability of functions, only functions not hidden are reported as installed.
    Type: Application
    Filed: March 18, 2020
    Publication date: July 9, 2020
    Inventors: Dan F. Greiner, Damian L. Osisek, Timothy J. Slegel
  • Patent number: 10684863
    Abstract: Restricted instructions are prohibited from execution within a transaction. There are classes of instructions that are restricted regardless of type of transaction: constrained or nonconstrained. There are instructions only restricted in constrained transactions, and there are instructions that are selectively restricted for given transactions based on controls specified on instructions used to initiate the transactions.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: June 16, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Christian Jacobi, Timothy J. Slegel
  • Patent number: 10671390
    Abstract: A conditional instruction end facility is provided that allows completion of an instruction to be delayed. In executing the machine instruction, an operand is obtained, and a determination is made as to whether the operand has a predetermined relationship with respect to a value. Based on determining that the operand does not have the predetermined relationship with respect to the value, the obtaining and the determining are repeated. Based on determining that the operand has the predetermined relationship with respect to the value, execution of the instruction is completed.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: June 2, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES
    Inventors: Dan F. Greiner, Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel
  • Patent number: 10664269
    Abstract: Selected installed function of a multi-function instruction is hidden such that even though a processor is capable of performing the hidden installed function, the availability of the hidden function is hidden such that responsive to the multi-function instruction querying the availability of functions, only functions not hidden are reported as installed.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: May 26, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Damian L. Osisek, Timothy J. Slegel
  • Patent number: 10606597
    Abstract: A NONTRANSACTIONAL STORE instruction, executed in transactional execution mode, performs stores that are retained, even if a transaction associated with the instruction aborts. The stores include user-specified information that may facilitate debugging of an aborted transaction.
    Type: Grant
    Filed: March 3, 2013
    Date of Patent: March 31, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Christian Jacobi, Timothy J. Slegel
  • Patent number: 10599435
    Abstract: A NONTRANSACTIONAL STORE instruction, executed in transactional execution mode, performs stores that are retained, even if a transaction associated with the instruction aborts. The stores include user-specified information that may facilitate debugging of an aborted transaction.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: March 24, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Christian Jacobi, Timothy J. Slegel
  • Patent number: 10585697
    Abstract: A transactional memory system dynamically predicts the resource requirements of hardware transactions. A processor of the transactional memory system predicts resource requirements of a first hardware transaction to be executed based on a resource hint, a type of hardware transaction that is associated with a given hardware transaction, and a previous execution of a prior hardware transaction that is associated with the type of hardware transaction. The processor allocates resources for the given hardware transaction based on the predicted resource requirements. The processor initiates execution of the first hardware transaction using at least a portion of the allocated resources.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: March 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Fadi Y. Busaba, Dan F. Greiner, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum
  • Patent number: 10579377
    Abstract: A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: March 3, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Christian Jacobi, Volodymyr Paprotski, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel
  • Patent number: 10572298
    Abstract: A transactional memory system dynamically predicts the resource requirements of hardware transactions. A processor of the transactional memory system predicts resource requirements of a first hardware transaction to be executed based on a resource hint, a type of hardware transaction that is associated with a given hardware transaction, and a previous execution of a prior hardware transaction that is associated with the type of hardware transaction. The processor allocates resources for the given hardware transaction based on the predicted resource requirements. The processor initiates execution of the first hardware transaction using at least a portion of the allocated resources.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: February 25, 2020
    Assignee: International Business Machines Corporation
    Inventors: Fadi Y. Busaba, Dan F. Greiner, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum
  • Patent number: 10572301
    Abstract: An efficient facility for determining resource usage, such as a processor time used by tasks. The determination is performed on behalf of user applications that do not require a call to operating system services. The facility includes an instruction that determines elapsed time and reports it to the user as a single unit of operation.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: February 25, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Dan F. Greiner
  • Patent number: 10572254
    Abstract: A query is performed to obtain cache residency and/or other information regarding selected data. The data to be queried is data of a cache line, prefetched or otherwise. The capability includes a Query Cache instruction that obtains cache residency information and/or other information and returns an indication of the requested information.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: February 25, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Michael K. Gschwind, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel
  • Patent number: 10565003
    Abstract: When executed, a transaction-hint instruction specifies a transaction-count-to-completion (CTC) value for a transaction. The CTC value indicates how far a transaction is from completion. The CTC may be a number of instructions to completion or an amount of time to completion. The CTC value is adjusted as the transaction progresses. When a disruptive event associated with inducing transactional aborts, such as an interrupt or a conflicting memory access, is identified while processing the transaction, processing of the disruptive event is deferred if the adjusted CTC value satisfies deferral criteria. If the adjusted CTC value does not satisfy deferral criteria, the transaction is aborted and the disruptive event is processed.
    Type: Grant
    Filed: January 2, 2019
    Date of Patent: February 18, 2020
    Assignee: International Business Machines Corporation
    Inventors: Fadi Y. Busaba, Harold W. Cain, III, Dan F. Greiner, Michael Karl Gschwind, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum, Timothy J. Slegel
  • Patent number: 10558465
    Abstract: Restricted instructions are prohibited from execution within a transaction. There are classes of instructions that are restricted regardless of type of transaction: constrained or nonconstrained. There are instructions only restricted in constrained transactions, and there are instructions that are selectively restricted for given transactions based on controls specified on instructions used to initiate the transactions.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: February 11, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Christian Jacobi, Timothy J. Slegel
  • Patent number: 10521231
    Abstract: In a processor supporting execution of a plurality of functions of an instruction, an instruction blocking value is set for blocking one or more of the plurality of functions, such that an attempt to execute one of the blocked functions, will result in a program exception and the instruction will not execute, however the same instruction will be able to execute any of the functions that are not blocked functions.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: December 31, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Lisa C. Heller, Damian Leo Osisek, Timothy J. Slegel
  • Publication number: 20190377379
    Abstract: A clock comparator sign control is used in a compare operation. A clock comparator sign control that determines whether unsigned arithmetic or signed arithmetic is to be used in a comparing operation is obtained. The clock comparator sign control is then used in a comparison of a value of a clock comparator and at least a portion of a value of a time-of-day clock to determine whether a selected action is to be recognized.
    Type: Application
    Filed: August 19, 2019
    Publication date: December 12, 2019
    Inventors: Eberhard Engler, Dan F. Greiner, Michel H. T. Hack, Timothy J. Slegel, Joachim von Buttlar
  • Patent number: 10496292
    Abstract: A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: December 3, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Christian Jacobi, Damian L. Osisek, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel
  • Patent number: 10496311
    Abstract: A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: December 3, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel
  • Publication number: 20190339973
    Abstract: A conditional instruction end facility is provided that allows completion of an instruction to be delayed. In executing the machine instruction, an operand is obtained, and a determination is made as to whether the operand has a predetermined relationship with respect to a value. Based on determining that the operand does not have the predetermined relationship with respect to the value, the obtaining and the determining are repeated. Based on determining that the operand has the predetermined relationship with respect to the value, execution of the instruction is completed.
    Type: Application
    Filed: July 17, 2019
    Publication date: November 7, 2019
    Inventors: Dan F. Greiner, Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel