Abstract: The present invention is related to a method and an apparatus for the orthogonal complex-domain spreading modulation in CDMA spread spectrum communication system when there are channels with statistically higher transmitting power. In CDMA spread spectrum communication systems with a transmitter and a receiver, the transmitter according to the invention has several channels with different information. Two channels with higher power than the others, which are spread in the conventional scheme, are spread with the orthogonal codes using a complex-domain multiplier. The spread signals are added. Then the signals are scrambled using a complex-domain multiplier with secondary scrambling sequences generated by a special scrambling code generator with primary scrambling sequences as inputs. The receiver does reverse operation of the transmitter.

Abstract: The present invention is related to a statistical multiplexing method and apparatus using a multi-dimensional orthogonal resource hopping multiplexing method in a wired/wireless communication systems where a plurality of communication channels, which are synchronized through a single medium, coexist.

Abstract: This invention is concerned with a transmission control method and apparatus in a collision interval for a collision of multidimensional hopping patterns. In the present invention, each orthogonal wireless resource in the coordinate of the multidimensional orthogonal resource can hop according to the hopping pattern negotiated between a transmitter and a receiver, and each corresponding channel is distinguished by the hopping pattern. A specific multidimensional hopping pattern is allocated to each secondary station. The hopping pattern is either permanently allocated to the secondary stations or temporarily allocated from the primary station during a call set-up. The permanent allocation of the hopping pattern to the secondary stations is achieved when the hopping pattern is identified based on a unique identifier, such as ESN of the secondary station.

Abstract: Disclosed is a configuration method and device for a two-dimensional expandable crossbar matrix switch for application to tera-level high-speed and large-capacity switches. The present invention includes N input ports, N output ports, and an N×N matrix switch for transmitting cells between the input and output ports. Each input port includes N VOQs which are sequentially combined by n VOQs to configure respective L VOQ groups. The L VOQ groups are connected to L XSUs through independent interface ports. Therefore, each input port can transmit a maximum of L cells to the matrix switch during one cell time slot.

Abstract: The present invention is related to a statistical multiplexing method and apparatus using a multi-dimensional orthogonal resource hopping multiplexing method in a wired/wireless communication systems where a plurality of communication channels, which are synchronized through a single medium, coexist.

Abstract: An ATM switch having the buffer threshold controller to control the cell input into the switching element using the back-pressure signal and a method for determining the buffer threshold according to the buffer threshold controller are disclosed. The ATM switch includes buffer pool storing the cell input to the switch; buffer pool control part storing the buffer pool occupancy information per input port of the buffer pool; threshold control part receiving the buffer pool occupancy information from the buffer pool control part and calculating the threshold per input port periodically and then sending it to the buffer pool control part; input crosspoint control part controlling the cells input to the buffer pool by receiving the control signal from the buffer pool control part; and output crosspoint control part controlling the cells output from the buffer pool by receiving the control signal from the buffer pool control part.

Abstract: A cell re-sequencer restores cell sequence in multipath ATM switches by using per-VC logical queues that store only cells belonging to a same VC. The re-sequencer can reduce processing time to a shorter value than those of conventional re-sequencer mechanisms. Also, this re-sequencer has no restriction on the peak rate of VCs and no arbitration functions to select an output cell. The re-sequencer comprises a RAM buffer, a CAM/RAM table, a controller, etc.

Abstract: A controller for the logical buffer depth in ATM switching system and a method for determining the logical queue depth, using the back-pressure signal and the occupied buffer depth information and supporting the P classes, are disclosed. The controller includes Routing Table Element making tag for routing of input cell; Input Buffer storing the cell that a tag is attached to in said routing table element; Switch fabric that reads the cell from said input buffer and then switches it to the output port; and Input buffer controller controlling the logical queue size in said input buffer.

Abstract: An idle address controller for a shared buffer type ATM switch controls the addresses of output cells in a common memory to be stored directly in an idle address buffer without passing through the conventional idle address delay controller, by improving the idle address control scheme of a unit switch. The idle address controller includes an idle address control signal generator for generating idle address control signals based on the buffer length information from counters, idle address control signal buffers for storing the idle address control signals, and an idle address control signal multiplexer. Therefore, the idle addresses can be efficiently provided, and this mechanism lowers cell loss and reduces required memory capacity.