Abstract: According to one embodiment, a flyback power converter comprises a primary circuit including a flyback driver, and an isolated output circuit responsive to the primary circuit. The isolated output circuit is used to power a load. The flyback driver is configured to identify a load current in the isolated output circuit from an input power to the primary circuit, and to regulate the load current according to the input power. In one embodiment, the flyback driver is configured to sense an input voltage to the flyback power converter, to identify an average current value corresponding to a current through a converter switch in the primary circuit, and to multiply the average current value and the input voltage to determine the input power to the primary circuit.

Abstract: According to one embodiment, a flyback power converter comprises a primary circuit including a flyback driver, and an isolated output circuit responsive to the primary circuit. The isolated output circuit is used to power a load. The flyback driver is configured to identify a load current in the isolated output circuit from an input power to the primary circuit, and to regulate the load current according to the input power. In one embodiment, the flyback driver is configured to sense an input voltage to the flyback power converter, to identify an average current value corresponding to a current through a converter switch in the primary circuit, and to multiply the average current value and the input voltage to determine the input power to the primary circuit.

Abstract: A power factor correction integrated circuit housed in an integrated circuit package for controlling a boost converter circuit having an input inductor coupled in series with a boost rectifier between a rectified AC line input voltage and a DC bus voltage, on a DC bus, the rectified AC line input voltage provided by a rectifier coupled to an AC line input voltage to be power factor corrected.

Abstract: A ballast control integrated circuit for a ballast driving a high intensity discharge (HID) lamp. The control integrated circuit has a first circuit for controlling a DC to DC converter receiving a first DC voltage and providing an increased DC voltage. The first circuit includes a driver for providing a pulsed signal to drive a first switch coupled to a flyback transformer of the DC to DC converter. A second circuit controls a DC to AC converter, the second circuit controlling a switching circuit receiving the increased DC voltage and driving the HID lamp with an AC voltage. The second circuit has a driver circuit for driving the switching circuit. The switching circuit is an H-bridge switching circuit coupled to drive the HID lamp.

Abstract: An apparatus and method for determining the output current in a bridge-connected switched transistor output circuit including high-side and low-side transistor switches, typically MOSFETS. The voltage at a common node between the high and low side switches is sensed, and offset in a first circuit by a fixed amount so that the voltage is positive for all positive or negative output currents of interest. The output current is actually determined in a second circuit which receives the offset voltage signal only predetermined times in relation to the on-time of the low side switch. The first circuit includes a current reference source/level shifter and a current mirror circuit formed of a plurality of transistors in a particular circuit configuration. The second circuit is coupled to an output of the first circuit by a gated NMOS transistor at the desired times to provide the current measurement signal.

Abstract: An integrated circuit controls a power converter that includes single stage buck-boost converter and a switching full bridge that may be used to drive an HID lamp. The single stage buck-boost converter reduces the complexity and parts count of the power converter, or electronic ballast, while permitting PFC and DC bus voltage regulation under control of the integrated circuit to maintain constant power on the HID lamp. The integrated circuit simplifies the design of power converters and electronic ballasts in particular, while reducing part count, complexity and cost in conjunction with the single stage buck-boost converter and the full bridge switching circuit.

Abstract: A ballast control circuit having a bridge driver for driving a transistor bridge of a ballast circuit coupled to a resonant ballast output stage including a lamp, the ballast control circuit comprising a circuit for setting a minimum oscillation frequency and a voltage controlled oscillation circuit having a first input, wherein as a voltage at the first input increases, modes of the circuit change from a preheat mode where the frequency of oscillation moves from a first frequency to a lower preheat frequency and continues at a substantially constant preheat frequency for a set duration of preheat time, to an ignition mode where the frequency moves lower towards a resonance frequency of the ballast output stage until the lamp ignites, and to a run mode where the frequency stops decreasing and stays at the minimum set frequency.

Abstract: A high voltage offset detection circuit registers the voltage at the midpoint of a switching half-bridge and may determine when the midpoint voltage reaches a given value to avoid hard-switching in the half-bridge switches. The midpoint voltage of the switching half-bridge is applied through a buffer to a MOSFET that is current limited to produce a voltage that reflects the voltage of the midpoint of the switching half-bridge. The voltage produced by the MOSFET may be supplied to a comparator with a threshold input to obtain a signal that indicates when the switches of the switching half-bridge may be turned on to avoid hard-switching. An adaptive dead-time circuit and method may comprise the above sensing circuit, a first circuit for generating a first signal indicative of a high to low transition of the midpoint voltage; and an output circuit for generating an adaptive dead-time output signal based thereon.

Abstract: A ballast control integrated circuit for a ballast driving a high intensity discharge (HID) lamp. The control integrated circuit has a first circuit for controlling a DC to DC converter receiving a first DC voltage and providing an increased DC voltage. The first circuit includes a driver for providing a pulsed signal to drive a first switch coupled to a flyback transformer of the DC to DC converter. A second circuit controls a DC to AC converter, the second circuit controlling a switching circuit receiving the increased DC voltage and driving the HID lamp with an AC voltage. The second circuit has a driver circuit for driving the switching circuit. The switching circuit is an H-bridge switching circuit coupled to drive the HID lamp.

Abstract: A bootstrap diode emulator circuit for use in a half-bridge switching circuit employing transistors connected to one another in a totem pole configuration, a driver circuit for driving the transistors, and a bootstrap capacitor for providing power to the high-side driver circuit. The bootstrap diode emulator circuit includes an LDMOS transistor having a gate, a back-gate, a source and a drain, the drain of the LDMOS transistor being coupled to the high-side supply node, the source of the LDMOS transistor being coupled to the low-side supply node; a gate control circuit electrically coupled to the gate of the LDMOS transistor, and a dynamic back-gate biasing circuit electrically coupled to the back-gate of the LDMOS transistor. The dynamic back-gate biasing circuit is operable to dynamically bias the back-gate of the LDMOS transistor when the LDMOS is turned on by applying a voltage to the back-gate of the LDMOS transistor that is close to but slightly lower than a voltage of the drain of the LDMOS transistor.

Abstract: A ballast control circuit having a bridge driver for driving a transistor bridge of a ballast circuit coupled to a resonant ballast output stage including a lamp, the ballast control circuit comprising a circuit for setting a minimum oscillation frequency and a voltage controlled oscillation circuit having a first input, wherein as a voltage at the first input increases, modes of the circuit change from a preheat mode where the frequency of oscillation moves from a first frequency to a lower preheat frequency and continues at a substantially constant preheat frequency for a set duration of preheat time, to an ignition mode where the frequency moves lower towards a resonance frequency of the ballast output stage until the lamp ignites, and to a run mode where the frequency stops decreasing and stays at the minimum set frequency.

Abstract: A power factor correction integrated circuit housed in an integrated circuit package for controlling a boost converter circuit having an input inductor coupled in series with a boost rectifier between a rectified AC line input voltage and a DC bus voltage, on a DC bus, the rectified AC line input voltage provided by a rectifier coupled to an AC line input voltage to be power factor corrected.

Abstract: An integrated circuit controls a power converter that includes single stage buck-boost converter and a switching full bridge that may be used to drive an HID lamp. The single stage buck-boost converter reduces the complexity and parts count of the power converter, or electronic ballast, while permitting PFC and DC bus voltage regulation under control of the integrated circuit to maintain constant power on the HID lamp. The integrated circuit simplifies the design of power converters and electronic ballasts in particular, while reducing part count, complexity and cost in conjunction with the single stage buck-boost converter and the full bridge switching circuit.

Abstract: A high voltage offset detection circuit registers the voltage at the midpoint of a switching half-bridge to determine when the midpoint voltage reaches a given value to avoid hard-switching in the half-bridge switches. The midpoint voltage of the switching half-bridge is applied through a buffer to a MOSFET that is current limited to produce a voltage that reflects the voltage of the midpoint of the switching half-bridge. The voltage produced by the MOSFET may be supplied to a comparator with a threshold input to obtain a signal that indicates when the switches of the switching half-bridge may be turned on to avoid hard-switching. The MOSFET may be selectively enabled to detect the voltage. The buffer operates to prevent voltages being applied to the MOSFET lower than a low side return voltage to prevent shorts in the IC between the low side supply voltage and low side return.

Abstract: An apparatus and method for determining the output current in a bridge-connected switched transistor output circuit including high-side and low-side transistor switches, typically MOSFETS. The voltage at a common node between the high and low side switches is sensed, and offset in a first circuit by a fixed amount so that the voltage is positive for all positive or negative output currents of interest. The output current is actually determined in a second circuit which receives the offset voltage signal only predetermined times in relation to the on-time of the low side switch. The first circuit includes a current reference source/level shifter and a current mirror circuit formed of a plurality of transistors in a particular circuit configuration. The second circuit is coupled to an output of the first circuit by a gated NMOS transistor at the desired times to provide the current measurement signal.

Abstract: A high voltage offset detection circuit registers the voltage at the midpoint of a switching half-bridge and may determine when the midpoint voltage reaches a given value to avoid hard-switching in the half-bridge switches. The midpoint voltage of the switching half-bridge is applied through a buffer to a MOSFET that is current limited to produce a voltage that reflects the voltage of the midpoint of the switching half-bridge. The voltage produced by the MOSFET may be supplied to a comparator with a threshold input to obtain a signal that indicates when the switches of the switching half-bridge may be turned on to avoid hard-switching. An adaptive dead-time circuit and method may comprise the above sensing circuit, a first circuit for generating a first signal indicative of a high to low transition of the midpoint voltage; and an output circuit for generating an adaptive dead-time output signal based thereon.

Abstract: A bootstrap diode emulator circuit for use in a half-bridge switching circuit employing transistors connected to one another in a totem pole configuration, a driver circuit for driving the transistors, and a bootstrap capacitor for providing power to the high-side driver circuit. The bootstrap diode emulator circuit includes an LDMOS transistor having a gate, a back-gate, a source and a drain, the drain of the LDMOS transistor being coupled to the high-side supply node, the source of the LDMOS transistor being coupled to the low-side supply node; a gate control circuit electrically coupled to the gate of the LDMOS transistor, and a dynamic back-gate biasing circuit electrically coupled to the back-gate of the LDMOS transistor. The dynamic back-gate biasing circuit is operable to dynamically bias the back-gate of the LDMOS transistor when the LDMOS is turned on by applying a voltage to the back-gate of the LDMOS transistor that is close to but slightly lower than a voltage of the drain of the LDMOS transistor.

Abstract: An electronic ballast provides fault detection and safety features for overcurrent protection and hard switching at a half bridge. A voltage controlled oscillator supplies a switching frequency that is modifiable based on operationalfeedback parameters. A feedback circuit senses load current and output voltage to determiner fault conditions and to provide control information for adaptively adjusting the frequency of the voltage controlled oscillator. By appropriately controlling the voltage controlled oscillator output, the electronic ballast maintains a zero volt switching with minimum current switching to achieve an efficient and robust electronic ballast control. The entire control is integrated on a single integrated circuit.

Abstract: A ballast control provided on a through-slot wave solderable daughter card package that is vertically mountable on a mother board.

Abstract: A high voltage offset detection circuit registers the voltage at the midpoint of a switching half-bridge to determine when the midpoint voltage reaches a given value to avoid hard-switching in the half-bridge switches. The midpoint voltage of the switching half-bridge is applied through a buffer to a MOSFET that is current limited to produce a voltage that reflects the voltage of the midpoint of the switching half-bridge. The voltage produced by the MOSFET may be supplied to a comparator with a threshold input to obtain a signal that indicates when the switches of the switching half-bridge may be turned on to avoid hard-switching. The MOSFET may be selectively enabled to detect the voltage. The buffer operates to prevent voltages being applied to the MOSFET lower than a low side return voltage to prevent shorts in the IC between the low side supply voltage and low side return.