Abstract: Equalizer which includes a filter for compensating the frequency attenuation of the received signal transmitted by a Data circuit terminating equipment DCE through a base-band telecommunication line. The equalizer includes a detector determining the instants when the received signal is equal to a predetermined voltage reference value Vref and a timer for measuring the period DT separating two consecutive instants. The coefficients of the filters included in the equalizer are computed in accordance with the measured period DT. This provides an adaptive compensation of the distortion introduced by the telecommunication line without necessitating any training sequence. For this purpose, the equalizer further includes a comparator for comparing the measured DT value to a given DTref value. When the former is greater than the latter, the equalization process is increased by a factor depending on DTref, DTmax being the maximum measured value and DTmin corresponding to the minimum measured DT value.

Abstract: A clock frequency tester circuit for determining whether the frequency of a clock (FB) is comprised within a predetermined range (FA-FA/n, FA+FA/n) centered around a reference frequency (FA), is described. The clock frequency tester circuit includes a frequency mixer which provides an output frequency FQ in accordance with the relation: FQ=absolute value of (FA-FB), for a frequency FB close to FA, and a divide-by-n circuit which divides the frequency FB of the clock to be tested. The frequency tester further includes a phase frequency comparator which has a first and second input lead F1 and F2 which are, respectively, connected to the output of the divide-by-n circuit and to the output of the frequency mixer. The phase frequency comparator generates an output signal Q2 which remains at a steady level whenever F1 input signal has a frequency which is higher than that of the input signal F2, i.e.

Abstract: An arbitration device for enabling a common resource to be shared by a plurality of processors, all connected by a common bus and each processor having a certain access priority. When more than one processor requests access to the resource, the highest priority processor request signal is latched and access is granted while the other requesting processor's latches remain set (access not granted). If two processors request access while the resource is busy, then only the latch of the processor having the highest priority of the two will be reset when the bus becomes available, and that processor will gain access.

Abstract: This interface circuit between a bidirectional line (Lg) and a telephone exchange includes a high frequency transformer (Tr) whose secondary (N2) is connected to said line through a detector circuit (DET) and whose primary (N1) is connected to the switching network of said telephone exchange and to a high frequency carrier source. The circuit further includes means for adjusting the impedances seen across the points where the telephone line is connected to the exchange, so as to meet specified values applicable to the particular location of the exchange. The impedance adaptation means include means (A1) for amplifying the line current variations seen at the center tap (K) of the high frequency transformer (Tr), addition means (.SIGMA.1) for adding the output from (A1) to the voice signal to be sent to the telephone line (Lg), and second amplification means (A2) responsive to the output from (.SIGMA.1) to drive said center tap (K).

Abstract: Arrangements are described for correcting the voltage coefficient of resistance (VCR) of resistors integral with a semiconductor body and, more particularly, for correcting the VCR of resistors implanted in a semi-conductor body. Resistors typically comprising a resistive region of a first conductivity type formed in an isolated layer of opposite conductivity type which isolated layer, in general, includes an epitaxial layer passivated by a dielectric layer. A metal layer is formed on the dielectric layer and covers, at least partially, the resistive layer. The metal layer is brought to a suitable potential to produce opposite variations in the resistance with respect to variations created by the epitaxial layer.