Patents by Inventor Daniel de Araujo

Daniel de Araujo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10931640
    Abstract: Methods and systems for managing computer network traffic are provided. A computer implemented method includes tunneling network traffic between a first network and a second network using a data storage system that is shared by the first network and the second network.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: February 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Scott Moonen, Robert E. Warren, Robley Hall, Daniel de Araujo
  • Publication number: 20190394164
    Abstract: Methods and systems for managing computer network traffic are provided. A computer implemented method includes tunneling network traffic between a first network and a second network using a data storage system that is shared by the first network and the second network.
    Type: Application
    Filed: June 22, 2018
    Publication date: December 26, 2019
    Inventors: Scott Moonen, Robert E. Warren, Robley Hall, Daniel de Araujo
  • Patent number: 8390393
    Abstract: Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: March 5, 2013
    Assignee: International Business Machines Corporation
    Inventors: Justin P. Bandholz, Moises Cases, Robert J. Christopher, Daniel de Araujo, Bradley D. Herrman, Erdem Matoglu, Bhyrav M. Mutnury, Pravin S. Patel, Nam H. Pham
  • Publication number: 20080098149
    Abstract: A signal history controlled slew-rate transmission method and bus interface transmitter provide an improved channel equalization mechanism having low complexity. A variable slew-rate feed-forward pre-emphasis circuit changes the slew rate of the applied pre-emphasis in conformity with the history of the transmitted signal. The pre-emphasis circuit may be implemented by a pair of current sources supplying the output of the transmitter, and having differing current values. The current sources are controlled such that upon a signal value change, a high slew rate is provided and when the signal value does not change for two consecutive signal periods, the slew rate is reduced. A current source having a controlled magnitude may be employed to provide a slew rate that changes over time and is continuously reduced until another transmission value change occurs.
    Type: Application
    Filed: December 21, 2007
    Publication date: April 24, 2008
    Inventors: Daniel De Araujo, Daniel Dreps, Bhyrav Mutnury
  • Publication number: 20070257699
    Abstract: A multi-memory module circuit topology is disclosed that includes a memory controller, a plurality of memory modules connected to the memory controller through a memory bus, and a resonator connected to the plurality of memory modules in a starburst topology. A method for reducing impedance discontinuities in a multi-memory module circuit is disclosed that includes providing a plurality of memory modules connected to a memory controller through a memory bus, selecting a starburst topology, and connecting a resonator to the plurality of memory module in dependence upon the selected starburst topology. An additional method for reducing impedance discontinuities in a multi-memory module circuit is disclosed that includes providing by a resonator a predetermined discontinuity reducing impedance at a predetermined location in the multi-memory module circuit between at least two memory modules, the multi-memory module circuit having a plurality of components of logically arranged around the predetermined location.
    Type: Application
    Filed: April 20, 2006
    Publication date: November 8, 2007
    Inventors: Moises Cases, Daniel De Araujo, Erdem Matoglu, Pravin Patel, Nam Pham
  • Publication number: 20070208463
    Abstract: In an embodiment, a predicted voltage to supply to an electronic device is learned based on a dynamic voltage variation that occurs at the electronic device. The dynamic voltage variation occurs in response to the electronic device processing a functional event, and the predicted voltage is supplied to the electronic device in response to observing the functional event on a bus that is connected to the electronic device. In response to observing the dynamic voltage variation, the predicted voltage that is associated with the functional event is modified based on the dynamic voltage variation. Then, on the next occurrence of the functional event, the predicted voltage is supplied to the electronic device. In this way, voltage transients at the electronic device are controlled.
    Type: Application
    Filed: March 2, 2006
    Publication date: September 6, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gerald Bartley, Moises Cases, Daniel de Araujo, Mark Maxson
  • Publication number: 20070011288
    Abstract: Data processing devices arranged in a redundant manner, with each of the devices including a thermal sensor measuring its operating temperature, are allocated so that data is processed by the coolest available device. In one form of the invention, the same data is stored in two data storage devices to be retrieved from the device having a cooler operating temperature. When the data is to be stored, it may further be stored in the coolest one of a number of storage devices. In other forms of the invention, the data processing devices are, for example, adapter circuits or computer systems accessed by a server.
    Type: Application
    Filed: May 31, 2005
    Publication date: January 11, 2007
    Applicant: International Business Machines Corporation
    Inventors: Moises Cases, Daniel de Araujo, Menas Roumbakis, Nam Pham
  • Publication number: 20060280018
    Abstract: An apparatus, system, and method are disclosed for modifying memory device timing and voltage. A detection module detects a change of memory device stress. A timing modification module modifies the memory device timing in response to the change of the memory device stress. In addition, a voltage modification module modifies the memory device voltage in response to the change of the memory device stress. In one embodiment, a processor pause module pauses the operation of a processor module while the timing modification module modifies the memory device timing and the voltage modification module modifies the memory device voltage.
    Type: Application
    Filed: June 9, 2005
    Publication date: December 14, 2006
    Inventors: Moises Cases, Daniel de Araujo, Nam Pham, Menas Roumbakis
  • Publication number: 20060123285
    Abstract: A computer system including an error recovery system establishes error threshold inversely proportional to the number of a like kind of system resources, such as host adapters. When a host adapter is initialized or deactivated, a software subcomponent of a processing device calculates a new threshold number and writes it to a memory location associated with each host adapter. When a number of errors exceeds the threshold number, the host adapter is reset, quiesced for repair, or fenced for replacement.
    Type: Application
    Filed: November 16, 2004
    Publication date: June 8, 2006
    Inventors: Daniel De Araujo, Paul Richards, Brian Rinaldi, Todd Sorenson
  • Publication number: 20060112308
    Abstract: Techniques are provided for selecting status data. Redundant views are obtained from multiple synchronous redundant devices. It is determined that the redundant views from the multiple synchronous redundant devices are conflicting. A redundant view score is calculated for each of the redundant views based on one or more characteristics from each of at least two characteristic types, wherein the characteristics are associated with weighted scores. One of the redundant views is selected based on the calculated redundant view score for each of the redundant views.
    Type: Application
    Filed: November 8, 2004
    Publication date: May 25, 2006
    Inventors: Timothy Crawford, James Davison, Daniel de Araujo, Paul Richards