Abstract: A radio frequency (RF) receiver having an analog gain control section for controlling the gain of a received RF signal, and a digital demodulator section for demodulating the output of the gain control section, includes an analog GO circuit connected to recognize the presence of a data packet within a received RF signal in the analog gain control section, and in response to produce an analog GO signal, a digital GO circuit connected to recognize the presence of a data packet within the received RF signal from the digital demodulator section, and in response to produce a digital GO signal, and control circuitry connected to enable gain control functions within the analog gain control section and digital demodulator functions within the digital demodulator section in response to respective analog and digital GO signals.

Abstract: A radio frequency (RF) receiver having an analog gain control section for controlling the gain of a received RF signal, and a digital demodulator section for demodulating the output of the gain control section, includes an analog GO circuit connected to recognize the presence of a data packet within a received RF signal in the analog gain control section, and in response to produce an analog GO signal, a digital GO circuit connected to recognize the presence of a data packet within the received RF signal from the digital demodulator section, and in response to produce a digital GO signal, and control circuitry connected to enable gain control functions within the analog gain control section and digital demodulator functions within the digital demodulator section in response to respective analog and digital GO signals.

Abstract: An RF receiver includes an analog GO circuit that recognizes the presence of a data packet within a received RF signal in the receiver's analog gain control section, and in response produces an analog GO signal, and a digital GO circuit that recognizes the presence of a data packet from the receiver's digital demodulator section, and in response produces a digital GO signal. Gain control functions within the analog gain control section, and digital demodulator functions within the digital demodulator section, are enabled in response to respective analog and digital GO signals. The system is capable of distinguishing a valid data packet from noise, co-channel interference and adjacent panel interference. A symbol timing recovery circuit within the receiver identifies periodic samples of a data packet preamble that most closely match the preamble bits, with the receiver employing a continuation of the identified periodic samples to decode the remainder of the data packet.

Abstract: Frequency offsets between a received carrier signal and a receiver's LO frequency are compensated by determining the offset and adjusting the phase of a demodulated signal derived from the modulated carrier. For frequency offsets that produce DC voltage offsets in I and Q components of the demodulated signal, the phase correction is implemented by operating upon the I and Q components with phase rotation operators in the form of sin ? and cos ?, where ? is an angle whose tangent is the result of dividing the Q by the I frequency offsets.

Abstract: Frequency offsets between a received carrier signal and a receiver's LO frequency are compensated by determining the offset and adjusting the phase of a demodulated signal derived from the modulated carrier. For frequency offsets that produce DC voltage offsets in I and Q components of the demodulated signal, the phase correction is implemented by operating upon the I and Q components with phase rotation operators in the form of sin &thgr; and cos &thgr;, where &thgr; is an angle whose tangent is the result of dividing the Q by the I frequency offsets.

Abstract: The preferred embodiment improves the modulation accuracy of a communication system having a surface acoustic wave (SAW) device filtering a modulated signal. An equalizer filter is used to predistort the signal to be filtered so as to equalize the SAW filter response. In the preferred approach, the equalizer also provides baseband filtering. In this particular embodiment, the original baseband filter impulse response is convolved with the inverse of the actual SAW filter impulse response. The resulting values provide the coefficients for a digital filter (i.e., a modified baseband filter) forming part of a DQPSK modem. When the signal filtered by the modified baseband filter is then up-converted and filtered by the SAW filter, the predistortion caused by the modified baseband filter equalizes the SAW filter distortion, and only the modulation errors of the original baseband filter occur.

Abstract: A radio frequency (RF) transceiver includes a direct modulation transmitter and single down-conversion receiver for operation in a time-division-duplex (TDD) telecommunications environment. A single RF signal source, in the form of a phase-lock-loop (PLL), is used on a time-shared basis to provide both the carrier signal for the transmitter and the local oscillator (LO) signal for the receiver. In the transmitter, direct modulation is effected by modulating a voltage-controlled oscillator (VCO) in the PLL with a burst of the transmit data while opening the loop and holding the loop feedback tuning voltage constant. In the receiver, a self-adjusting comparator threshold is provided for automatically setting and adjusting a demodulated signal comparison threshold used in retrieving the data and data clock from the demodulated receive signal.

Abstract: The preferred embodiment modem is an all hardware modulator which receives as its input two baseband drive signals, I and Q, which can come from a ROM filter or any other digital filter. Instead of storing modem responses in a ROM, multiplexers for the I and Q channels are used in combination with a control circuit to essentially perform as sine/cosine modulators for the baseband signal. The inputs into the I channel multiplexer include a non-inverted I signal, an inverted I signal, and a mid-value signal. The Q channel multiplexer has applied to it a non-inverted Q signal, an inverted Q signal, and a mid-value Q signal. Two-bit counters are applied to the control terminals of the I and Q multiplexers, where the 2-bit counters are clocked by a sample frequency. In one embodiment, the sample frequency is chosen to be four times the carrier frequency. The counter for the Q channel begins one count behind the I channel counter, thus giving a 90.degree. phase shift for the Q channel.

Abstract: A ROM filter includes a number of ROMs, each of which is programmed to hold data relating to several pulse response curves during only a particular time interval. As data are read into the filter, data pertaining to a particular pulse response curve are addressed in each of the ROMs. The outputs of the ROMs are connected to an adder, which adds the data read from the ROMs and passes it through a digital-to-analog converter. In this arrangement, the ROMs are required to store only the data relating to the pulse response curves during a particular interval. These data are added together in real time in an adder which is external to the ROM. With this structure the area of the ROM can be significantly reduced, as compared with ROM filters in which the addition is programmed into the ROM.