Patents by Inventor Daniel J. Eddleman

Daniel J. Eddleman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10263414
    Abstract: In one embodiment, a pass MOSFET is coupled in series between an input voltage and a load, and a bypass capacitor is connected in parallel with the load. In response to a voltage step across the MOSFET, the MOSFET is adaptively controlled to conduct an in-rush current of 2ICL=2IL during the bypass capacitor 12 charging time, where ICL is the capacitive current and IL is the load current. This optimizes the in-rush current to achieve a minimum peak temperature of the MOSFET. In one embodiment, a ramp capacitor connected to the drain of the MOSFET is part of a feedback path that tracks the MOSFET drain voltage to control the gate voltage.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: April 16, 2019
    Assignee: Linear Technology Corporation
    Inventors: Zhizhong Hou, Mitchell E. Lee, Daniel J. Eddleman
  • Publication number: 20170063076
    Abstract: In one embodiment, a pass MOSFET is coupled in series between an input voltage and a load, and a bypass capacitor is connected in parallel with the load. In response to a voltage step across the MOSFET, the MOSFET is adaptively controlled to conduct an in-rush current of 2ICL=2IL during the bypass capacitor 12 charging time, where ICL is the capacitive current and IL is the load current. This optimizes the in-rush current to achieve a minimum peak temperature of the MOSFET. In one embodiment, a ramp capacitor connected to the drain of the MOSFET is part of a feedback path that tracks the MOSFET drain voltage to control the gate voltage.
    Type: Application
    Filed: June 7, 2016
    Publication date: March 2, 2017
    Inventors: Zhizhong Hou, Mitchell E. Lee, Daniel J. Eddleman