Patents by Inventor Daniel J. Linnen
Daniel J. Linnen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240192886Abstract: Methods and apparatus for efficiently handling large data files and their updates in NAND memory. In one example, provided is a data-storage system configured to reduce the frequency of data relocations by segregating a large data file into a plurality of subfiles. The size of such subfiles is appropriately selected to reduce the probability of occurrence for host-relocation conflicts and the magnitude of write amplification, thereby enabling the data-storage system to provide better quality of service while substantially maintaining acceptable levels of other pertinent performance characteristics. In some examples, a sequence of host read-modify-write commands is handled by generating a copy of implicated subfiles in a data buffer, applying subfile updates to the copy in the data buffer in accordance with the sequence, and relocating the implicated subfiles in the NAND memory using the updated versions thereof from the data buffer.Type: ApplicationFiled: August 14, 2023Publication date: June 13, 2024Inventors: Niles Yang, Daniel J. Linnen, Judah Gamliel Hahn
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Publication number: 20240176501Abstract: A data storage device stores files in its memory. The files may be logically fragmented in that various parts of a given file may be located in non-continuous logical addresses, which can be disadvantageous. The host can send a request to the data storage device to reduce such logical fragmentation. For example, the host can send a swap command to the data storage device, in response to which the data storage device swaps the logical addresses of data fragments of two different files. This results in the logical address of one or both of the data fragments being continuous with the logical address of another data fragment of the same file. This logical address swap can take place without physically moving the data in the memory.Type: ApplicationFiled: July 11, 2023Publication date: May 30, 2024Applicant: Western Digital Technologies, Inc.Inventors: Daniel J. Linnen, Ramanathan Muthiah, Judah Gamliel Hahn
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Patent number: 11947890Abstract: Techniques are presented for the application of neural networks to the fabrication of integrated circuits and electronic devices, where example are given for the fabrication of non-volatile memory circuits and the mounting of circuit components on the printed circuit board of a solid state drive (SSD). The techniques include the generation of high precision masks suitable for analyzing electron microscope images of feature of integrated circuits and of handling the training of the neural network when the available training data set is sparse through use of a generative adversary network (GAN).Type: GrantFiled: May 8, 2020Date of Patent: April 2, 2024Assignee: SanDisk Technologies LLCInventors: Cheng-Chung Chu, Janet George, Daniel J. Linnen, Ashish Ghai
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Patent number: 11908529Abstract: A data storage device includes a power supply circuit configured to supply power to the data storage device. The power supply circuit includes a voltage clamp configured to operate in a conduction state in response to an over-voltage condition of the power supply circuit. The power supply circuit also includes a fuse in series with the voltage clamp. The fuse is configured to open in response to a current flow through the fuse and the voltage clamp exceeding a threshold value. The power supply circuit also includes a switching device that is configured to latch in a forward conduction mode in response to the voltage clamp operating in the conduction state. The switching device couples power from a positive voltage bus to the voltage clamp when the switching device is in the forward conduction mode.Type: GrantFiled: January 19, 2022Date of Patent: February 20, 2024Assignee: Western Digital Technologies, Inc.Inventors: Daniel J. Linnen, Kirubakaran Periyannan, Khanfer A. Kukkady
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Patent number: 11893243Abstract: A storage system has a memory that is organized in wordlines. Each wordline has a number of strings. A controller in the storage system changes, in each of the wordlines, which of the strings is a last string programmed. Doing so can unmask a program disturb error when triple-level cells in the memory are used as pseudo-multi-level cells. By unmasking the program disturb error, the controller can detect and correct the error.Type: GrantFiled: October 6, 2021Date of Patent: February 6, 2024Assignee: Western Digital Technologies, Inc.Inventors: Daniel J. Linnen, Prakash Subedi, Khanfer A. Kukkady, Mark Murin
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Publication number: 20230402101Abstract: Embodiments of the present disclosure generally include methods of specially programming a set of memory cells, wherein each specially programmed memory cell is specially programmed along with programming a plurality of wordlines, and wherein each memory cell is specially programmed by altering a bitline and gate voltage applied to the memory cell. The methods further includes performing a sensing operation across a set of strings in the array of memory cells, determining, based on the sensing operation, whether one or more strings failed to conduct during a sensing operation, and determining the last programmed wordline using the one or more strings that failed to conduct.Type: ApplicationFiled: June 8, 2022Publication date: December 14, 2023Inventors: KIRUBAKARAN PERIYANNAN, DANIEL J. LINNEN, JAYAVEL PACHAMUTHU
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Publication number: 20230230641Abstract: A data storage device includes a power supply circuit configured to supply power to the data storage device. The power supply circuit includes a voltage clamp configured to operate in a conduction state in response to an over-voltage condition of the power supply circuit. The power supply circuit also includes a fuse in series with the voltage clamp. The fuse is configured to open in response to a current flow through the fuse and the voltage clamp exceeding a threshold value. The power supply circuit also includes a switching device that is configured to latch in a forward conduction mode in response to the voltage clamp operating in the conduction state. The switching device couples power from a positive voltage bus to the voltage clamp when the switching device is in the forward conduction mode.Type: ApplicationFiled: January 19, 2022Publication date: July 20, 2023Inventors: Daniel J. Linnen, Kirubakaran Periyannan, Khanfer A. Kukkady
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Patent number: 11640252Abstract: A data storage device includes a memory device, an internal power supply, and a controller. When the data storage device is in an idle power state, the controller is configured to electrically isolate the data storage device from an external power source and draw power from the internal power supply to perform data storage operations. The power utilized for the data storage operations while the data storage device is in the idle power state may be exclusively from the internal power supply or a mixture of the internal power supply and the external power supply. The total power utilized during the idle power state is less than a threshold that is relative to the active power of the data storage device or at a fixed value.Type: GrantFiled: March 18, 2021Date of Patent: May 2, 2023Assignee: Western Digital Technologies, Inc.Inventors: Daniel J. Linnen, Gunter Knestele, Kirubakaran Periyannan, San A. Phong
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Publication number: 20230106371Abstract: A storage system has a memory that is organized in wordlines. Each wordline has a number of strings. A controller in the storage system changes, in each of the wordlines, which of the strings is a last string programmed. Doing so can unmask a program disturb error when triple-level cells in the memory are used as pseudo-multi-level cells. By unmasking the program disturb error, the controller can detect and correct the error.Type: ApplicationFiled: October 6, 2021Publication date: April 6, 2023Applicant: Western Digital Technologies, Inc.Inventors: Daniel J. Linnen, Prakash Subedi, Khanfer A. Kukkady, Mark Murin
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Publication number: 20220300171Abstract: A data storage device includes a memory device, an internal power supply, and a controller. When the data storage device is in an idle power state, the controller is configured to electrically isolate the data storage device from an external power source and draw power from the internal power supply to perform data storage operations. The power utilized for the data storage operations while the data storage device is in the idle power state may be exclusively from the internal power supply or a mixture of the internal power supply and the external power supply. The total power utilized during the idle power state is less than a threshold that is relative to the active power of the data storage device or at a fixed value.Type: ApplicationFiled: March 18, 2021Publication date: September 22, 2022Inventors: Daniel J. LINNEN, Gunter KNESTELE, Kirubakaran PERIYANNAN, San A. PHONG
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Publication number: 20200364052Abstract: A memory circuit included in a computer system stores multiple program instructions in program code. In response to fetching a loop boundary instruction, a processor circuit may store, in a loop storage circuit, a set of program instructions included in a program loop associated with the loop boundary instruction. In executing at least one iteration of the program loop, the processor circuit may retrieve the set of program instructions from the loop storage circuit.Type: ApplicationFiled: November 11, 2019Publication date: November 19, 2020Inventors: Vijay Chinchole, Naman Rastogi, Sonam Agarwal, Daniel J. Linnen
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Publication number: 20200356718Abstract: Techniques are presented for the application of neural networks to the fabrication of integrated circuits and electronic devices, where example are given for the fabrication of non-volatile memory circuits and the mounting of circuit components on the printed circuit board of a solid state drive (SSD). The techniques include the generation of high precision masks suitable for analyzing electron microscope images of feature of integrated circuits and of handling the training of the neural network when the available training data set is sparse through use of a generative adversary network (GAN).Type: ApplicationFiled: May 8, 2020Publication date: November 12, 2020Applicant: SanDisk Technologies LLCInventors: Cheng-Chung Chu, Janet George, Daniel J. Linnen, Ashish Ghai
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Publication number: 20190187553Abstract: An apparatus is provided that includes a reticle including a die, the reticle configured to increase a number of partial die that can be successfully used as partially operable die.Type: ApplicationFiled: December 18, 2017Publication date: June 20, 2019Applicant: SANDISK TECHNOLOGIES LLCInventors: Daniel J. Linnen, Jianhua Zhu, Srikar Peesari, Kirubakaran Periyannan, Avinash Rajagiri, Shantanu Gupta, Jagdish Sabde, Ashish Ghai, Deepak Bharadwaj