Abstract: A method to reduce latency in an n'th order differentiator and in a frequency synthesizer having a MASH structure of sigma-delta modulators includes characterizing the differentiator according to its z-transform transfer function. The transfer function polynomial is expanded using Horner's Rule. Realizing the expanded polynomial in hardware reduces latency in both the differentiator and the frequency synthesizer. An n'th order differentiator utilizes parallel inputs in adders and latches and implicit multiplication at adder inputs to realize the z-transform transfer function using Horner's Rule. An n'th order MASH structure of sigma-delta modulators has n'th differentiators, each differentiator implementing a z-transform polynomial transfer function expanded using Horner's Rule.