Patents by Inventor Daniel Jerre Hubbard

Daniel Jerre Hubbard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11934686
    Abstract: A set of host data items is received for programming to the memory subsystem. The set of host data items is programmed to a first region of the memory subsystem that includes one or more memory devices. A determination is made that a sequence at which the set of host data items are programmed across memory devices of the first region does not correspond to a target sequence associated with accessing the set of host data items via the first region. The target sequence corresponds to a sequence that enables a host data items programmed to the memory sub-system to be accessed in parallel. The set of host data items is copied from the first region to a second region of the memory subsystem. A sequence at which the set of host data items is copied to memory devices of the second region corresponds to the target sequence.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: March 19, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Karl David Schuh, Kishore Kumar Muchherla, Daniel Jerre Hubbard, James Fitzpatrick
  • Publication number: 20230367723
    Abstract: Operations include establishing a queue storing a list of data burst commands to be communicated via a multiplexed interface coupled to the set of memory dies, communicating, during a first time period, a first data burst command in the queue to a first memory die of the set of memory dies via the multiplexed interface, and communicating, during a second time period, a second data burst command in the queue to a second memory die of the set of memory dies via the multiplexed interface, where a first latency associated with the first data burst command occurs during the second time period.
    Type: Application
    Filed: May 9, 2023
    Publication date: November 16, 2023
    Inventors: Eric N. Lee, Luigi Pilolli, Ali Feiz Zarrin Ghalam, Xiangyu Tang, Daniel Jerre Hubbard
  • Publication number: 20230333770
    Abstract: A set of host data items is received for programming to the memory subsystem. The set of host data items is programmed to a first region of the memory subsystem that includes one or more memory devices. A determination is made that a sequence at which the set of host data items are programmed across memory devices of the first region does not correspond to a target sequence associated with accessing the set of host data items via the first region. The target sequence corresponds to a sequence that enables a host data items programmed to the memory sub-system to be accessed in parallel. The set of host data items is copied from the first region to a second region of the memory subsystem. A sequence at which the set of host data items is copied to memory devices of the second region corresponds to the target sequence.
    Type: Application
    Filed: April 18, 2022
    Publication date: October 19, 2023
    Inventors: Karl David Schuh, Kishore Kumar Muchherla, Daniel Jerre Hubbard, James Fitzpatrick