Patents by Inventor Daniel Lee Kaczman

Daniel Lee Kaczman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230006702
    Abstract: A power amplifier output stage includes a first output array group having a first plurality of semiconductor devices, and a first loading adjustment module coupled to the first output array group. The first loading adjustment module is configured to adjust a loading of the first output array group to produce a first power dissipation value associated with the first output array group. The power amplifier output stage further includes a second output array group having a second plurality of semiconductor devices, and a second source loading adjustment module coupled to a second input of the second output array. The second source loading adjustment module is configured to adjust a source loading of the second output array group to produce a second power dissipation value associated with the second output array group, the first power dissipation value being different from the second power dissipation value.
    Type: Application
    Filed: September 8, 2022
    Publication date: January 5, 2023
    Inventors: Jason Xiangdong Deng, Yuanyue Jin, Wael Yahia Refai, Jose Gonzalez, Daniel Lee Kaczman, Shaikh Alam
  • Patent number: 9859853
    Abstract: Apparatus and methods for output matching of power amplifiers are provided. In certain configurations, a mobile device includes a power amplifier that amplifies an RF signal to generate an amplified RF signal at an output, an envelope tracker that generates a power amplifier supply voltage based on an envelope of the RF signal, a supply voltage biasing circuit that provides the power amplifier supply voltage from the envelope tracker to the output of the power amplifier, and an output matching circuit connected to the output of the power amplifier via an input node. The output matching circuit includes a first capacitor and a first inductor connected in series between the input node and ground, a second capacitor connected between the input node and ground, a second inductor connected between the input node and an intermediate node, and a DC blocking capacitor connected between the intermediate node and an output node.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: January 2, 2018
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventor: Daniel Lee Kaczman
  • Publication number: 20170222605
    Abstract: Apparatus and methods for output matching of power amplifiers are provided. In certain configurations, a mobile device includes a power amplifier that amplifies an RF signal to generate an amplified RF signal at an output, an envelope tracker that generates a power amplifier supply voltage based on an envelope of the RF signal, a supply voltage biasing circuit that provides the power amplifier supply voltage from the envelope tracker to the output of the power amplifier, and an output matching circuit connected to the output of the power amplifier via an input node. The output matching circuit includes a first capacitor and a first inductor connected in series between the input node and ground, a second capacitor connected between the input node and ground, a second inductor connected between the input node and an intermediate node, and a DC blocking capacitor connected between the intermediate node and an output node.
    Type: Application
    Filed: April 21, 2017
    Publication date: August 3, 2017
    Inventor: Daniel Lee Kaczman
  • Patent number: 9660688
    Abstract: Apparatus and methods for power amplifier output matching is provided. In certain configurations, an output matching circuit includes a supply voltage biasing circuit electrically connected between an input node and a power high supply voltage, a second-order harmonic series resonant circuit electrically connected between the input node and a power low supply voltage, a third-order harmonic parallel resonant circuit electrically connected between the input node and a harmonic frequency grounding node, a third-order harmonic series resonant circuit electrically connected between the harmonic frequency grounding node and the power low supply voltage, and a DC blocking capacitor electrically connected between the harmonic frequency grounding node and an output node.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: May 23, 2017
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventor: Daniel Lee Kaczman
  • Publication number: 20160285499
    Abstract: Apparatus and methods for power amplifier output matching is provided. In certain configurations, an output matching circuit includes a supply voltage biasing circuit electrically connected between an input node and a power high supply voltage, a second-order harmonic series resonant circuit electrically connected between the input node and a power low supply voltage, a third-order harmonic parallel resonant circuit electrically connected between the input node and a harmonic frequency grounding node, a third-order harmonic series resonant circuit electrically connected between the harmonic frequency grounding node and the power low supply voltage, and a DC blocking capacitor electrically connected between the harmonic frequency grounding node and an output node.
    Type: Application
    Filed: June 3, 2016
    Publication date: September 29, 2016
    Inventor: Daniel Lee Kaczman
  • Patent number: 9391567
    Abstract: Apparatus and methods for power amplifier output matching is provided. In certain configurations, an output matching circuit includes a supply voltage biasing circuit electrically connected between an input node and a power high supply voltage, a second-order harmonic series resonant circuit electrically connected between the input node and a power low supply voltage, a third-order harmonic parallel resonant circuit electrically connected between the input node and a harmonic frequency grounding node, a third-order harmonic series resonant circuit electrically connected between the harmonic frequency grounding node and the power low supply voltage, and a DC blocking capacitor electrically connected between the harmonic frequency grounding node and an output node.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: July 12, 2016
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventor: Daniel Lee Kaczman
  • Publication number: 20150365057
    Abstract: Apparatus and methods for power amplifier output matching is provided. In certain configurations, an output matching circuit includes a supply voltage biasing circuit electrically connected between an input node and a power high supply voltage, a second-order harmonic series resonant circuit electrically connected between the input node and a power low supply voltage, a third-order harmonic parallel resonant circuit electrically connected between the input node and a harmonic frequency grounding node, a third-order harmonic series resonant circuit electrically connected between the harmonic frequency grounding node and the power low supply voltage, and a DC blocking capacitor electrically connected between the harmonic frequency grounding node and an output node.
    Type: Application
    Filed: June 16, 2014
    Publication date: December 17, 2015
    Inventor: Daniel Lee Kaczman
  • Patent number: 9088249
    Abstract: Apparatus and methods for reducing capacitive loading of an envelope tracker are disclosed. In one embodiment, a wireless device comprises an envelope tracker including an output configured to generate a power amplifier supply voltage, a plurality of power amplifiers, and a power supply network configured to provide the power amplifier supply voltage to the plurality of power amplifiers. The power amplifier supply network includes a first inductor electrically connected between a supply input of a first power amplifier and the output of the envelope tracker, and a second inductor electrically connected between a supply input of a second power amplifier and the output of the envelope tracker. The first inductor resonates with a distributed capacitance of the power supply network at a frequency greater than the envelope tracker's modulation bandwidth of, and the second inductor resonates with the distributed capacitance at a frequency greater than the envelope tracker's modulation bandwidth.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: July 21, 2015
    Assignee: Skyworks Solutions, Inc.
    Inventors: Daniel Lee Kaczman, James Phillip Young
  • Patent number: 9054663
    Abstract: Apparatus and methods for reducing capacitive loading of a power amplifier supply control module are disclosed. In one embodiment, a method of power supply control in a power amplifier system includes controlling a voltage level of a supply voltage using a supply control module, amplifying a first radio frequency (RF) signal using a first power amplifier module, amplifying a second RF signal using a second power amplifier module, delivering the supply voltage to a first supply input of the first power amplifier module through a first resonant circuit, and delivering the supply voltage to a second supply input of the second power amplifier module through a second resonant circuit. The first resonant circuit includes a first inductor and a first capacitor electrically connected in parallel, and the second resonant circuit includes a second inductor and a second capacitor electrically connected in parallel.
    Type: Grant
    Filed: March 21, 2014
    Date of Patent: June 9, 2015
    Assignee: Skyworks Solutions, Inc.
    Inventors: Russ Alan Reisner, Daniel Lee Kaczman, Yu-Jui Lin, Andy Cheng Pang Wu
  • Publication number: 20140312977
    Abstract: Apparatus and methods for reducing capacitive loading of an envelope tracker are disclosed. In one embodiment, a wireless device comprises an envelope tracker including an output configured to generate a power amplifier supply voltage, a plurality of power amplifiers, and a power supply network configured to provide the power amplifier supply voltage to the plurality of power amplifiers. The power amplifier supply network includes a first inductor electrically connected between a supply input of a first power amplifier and the output of the envelope tracker, and a second inductor electrically connected between a supply input of a second power amplifier and the output of the envelope tracker. The first inductor resonates with a distributed capacitance of the power supply network at a frequency greater than the envelope tracker's modulation bandwidth of, and the second inductor resonates with the distributed capacitance at a frequency greater than the envelope tracker's modulation bandwidth.
    Type: Application
    Filed: June 30, 2014
    Publication date: October 23, 2014
    Inventors: Daniel Lee Kaczman, James Phillip Young
  • Patent number: 8797103
    Abstract: Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a power amplifier system includes an envelope tracker configured to provide a supply voltage to a plurality of power amplifiers. The power amplifiers include power supply inputs electrically connected in a star configuration so as to reduce a capacitive load of the envelope tracker. The distributed capacitance of the power amplifiers is used to provide RF grounding so as to reduce the size of or eliminated the use of bypass capacitors.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: August 5, 2014
    Assignee: Skyworks Solutions, Inc.
    Inventors: Daniel Lee Kaczman, James Phillip Young
  • Publication number: 20140203878
    Abstract: Apparatus and methods for reducing capacitive loading of a power amplifier supply control module are disclosed. In one embodiment, a method of power supply control in a power amplifier system includes controlling a voltage level of a supply voltage using a supply control module, amplifying a first radio frequency (RF) signal using a first power amplifier module, amplifying a second RF signal using a second power amplifier module, delivering the supply voltage to a first supply input of the first power amplifier module through a first resonant circuit, and delivering the supply voltage to a second supply input of the second power amplifier module through a second resonant circuit. The first resonant circuit includes a first inductor and a first capacitor electrically connected in parallel, and the second resonant circuit includes a second inductor and a second capacitor electrically connected in parallel.
    Type: Application
    Filed: March 21, 2014
    Publication date: July 24, 2014
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventors: Russ Alan Reisner, Daniel Lee Kaczman, Yu-Jui Lin, Andy Cheng Pang Wu
  • Patent number: 8717100
    Abstract: Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a power amplifier system includes a power amplifier configured to amplify a radio frequency (RF) signal of a first frequency and an envelope tracker configured to control a supply voltage of the power amplifier using an envelope of the RF signal. The power amplifier system further includes an inductor electrically connected between the power amplifier and the envelope tracker and a capacitor electrically connected between the power amplifier and the envelope tracker. The capacitor and the inductor are configured to have a resonance near the first frequency.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: May 6, 2014
    Assignee: Skyworks Solutions, Inc.
    Inventors: Russ Alan Reisner, Daniel Lee Kaczman, Yu-Jui Lin, Andy Cheng Pang Wu
  • Patent number: 8610503
    Abstract: Apparatus and methods for oscillation suppression are disclosed. In one embodiment, a power amplifier system includes a plurality of power amplifiers for amplifying an input radio frequency (RF) signal to generate an output RF signal. The plurality of power amplifiers include a first power amplifier, a second power amplifier, and a third power amplifier, each of which are configured to be individually switchable between an enabled state and a disabled state so as to control a power amplification of the power amplifier system. A first capacitor is electrically connected between the outputs of the first and second power amplifiers, and a second capacitor is electrically connected between the outputs of the second and third power amplifiers. The first and second capacitors are configured to allow signals generated using the first, second, and third power amplifiers to combine constructively to generate the output RF signal.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: December 17, 2013
    Assignee: Skyworks Solutions, Inc.
    Inventors: Daniel Lee Kaczman, Haibo Cao, Russ Alan Reisner, Nai-Shuo Cheng, James Phillip Young
  • Publication number: 20120235737
    Abstract: Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a power amplifier system includes a power amplifier configured to amplify a radio frequency (RF) signal of a first frequency and an envelope tracker configured to control a supply voltage of the power amplifier using an envelope of the RF signal. The power amplifier system further includes an inductor electrically connected between the power amplifier and the envelope tracker and a capacitor electrically connected between the power amplifier and the envelope tracker. The capacitor and the inductor are configured to have a resonance near the first frequency.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 20, 2012
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventors: Russ Alan Reisner, Daniel Lee Kaczman, Yu-Jui Lin, Andy Cheng Pang Wu
  • Publication number: 20120154054
    Abstract: Apparatus and methods for oscillation suppression are disclosed. In one embodiment, a power amplifier system includes a plurality of power amplifiers for amplifying an input radio frequency (RF) signal to generate an output RF signal. The plurality of power amplifiers include a first power amplifier, a second power amplifier, and a third power amplifier, each of which are configured to be individually switchable between an enabled state and a disabled state so as to control a power amplification of the power amplifier system. A first capacitor is electrically connected between the outputs of the first and second power amplifiers, and a second capacitor is electrically connected between the outputs of the second and third power amplifiers. The first and second capacitors are configured to allow signals generated using the first, second, and third power amplifiers to combine constructively to generate the output RF signal.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 21, 2012
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventors: Daniel Lee KACZMAN, Haibo CAO, Russ Alan REISNER, Nai-Shuo CHENG, James Phillip YOUNG
  • Publication number: 20120139641
    Abstract: Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a power amplifier system includes an envelope tracker configured to provide a supply voltage to a plurality of power amplifiers. The power amplifiers include power supply inputs electrically connected in a star configuration so as to reduce a capacitive load of the envelope tracker. The distributed capacitance of the power amplifiers is used to provide RF grounding so as to reduce the size of or eliminated the use of bypass capacitors.
    Type: Application
    Filed: December 6, 2011
    Publication date: June 7, 2012
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventors: Daniel Lee Kaczman, James Phillip Young