Patents by Inventor Daniel M. Cermak
Daniel M. Cermak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170287534Abstract: A flash memory system for use in an electronic system comprising an integrated circuit such as a microcontroller. The flash memory system embodies one or more circuits adapted to operate at sub- or near-threshold voltage levels. These low-power circuits are selectively activated or de-activated to balance power dissipation with the response time of the memory system required in particular applications.Type: ApplicationFiled: August 23, 2016Publication date: October 5, 2017Applicant: Ambiq Micro, IncInventors: Christophe J. Chevallier, Daniel M. Cermak, Scott Hanson
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Patent number: 9779788Abstract: A flash memory system for use in an electronic system comprising an integrated circuit such as a microcontroller. The flash memory system embodies one or more circuits adapted to operate at sub- or near-threshold voltage levels. These low-power circuits are selectively activated or de-activated to balance power dissipation with the response time of the memory system required in particular applications.Type: GrantFiled: August 23, 2016Date of Patent: October 3, 2017Assignee: Ambiq Micro, Inc.Inventors: Christophe J. Chevallier, Daniel M. Cermak, Scott Hanson
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Patent number: 9112867Abstract: A method and system for enforcing access control to system resources and assets. Security attributes associated with devices that initiate transactions in the system are automatically generated and forwarded with transaction messages. The security attributes convey access privileges assigned to each initiator. One or more security enforcement mechanisms are implemented in the system to evaluate the security attributes against access policy requirements to access various system assets and resources, such as memory, registers, address ranges, etc. If the privileges identified by the security attributes indicate the access request is permitted, the transaction is allowed to proceed. The security attributes of the initiator scheme provides a modular, consistent secure access enforcement scheme across system designs.Type: GrantFiled: June 13, 2014Date of Patent: August 18, 2015Assignee: Intel CorporationInventors: Manoj R. Sastry, Ioannis T. Schoinas, Daniel M. Cermak
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Patent number: 8959576Abstract: Method, apparatus, and system for qualifying CPU transactions with security attributes. Immutable security attributes are generated for transactions initiator by a CPU or processor core that identifying the execution mode of the CPU/core being trusted or untrusted. The transactions may be targeted to an Input/Output (I/O) device or system memory via which a protected asset may be accessed. Policy enforcement logic blocks are implemented at various points in the apparatus or system that allow or deny transactions access to protected assets based on the immutable security attributes generated for the transactions. In one aspect, a multiple-level security scheme is implemented under which a mode register is updated via a first transaction to indicate the CPU/core is operating in a trusted execution mode, and security attributes are generated for a second transaction using execution mode indicia in the mode register to verify the transaction is from a trusted initiator.Type: GrantFiled: March 14, 2013Date of Patent: February 17, 2015Assignee: Intel CorporationInventors: Manoj R. Sastry, Ioannis T. Schoinas, Daniel M. Cermak
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Publication number: 20140298408Abstract: A method and system for enforcing access control to system resources and assets. Security attributes associated with devices that initiate transactions in the system are automatically generated and forwarded with transaction messages. The security attributes convey access privileges assigned to each initiator. One or more security enforcement mechanisms are implemented in the system to evaluate the security attributes against access policy requirements to access various system assets and resources, such as memory, registers, address ranges, etc. If the privileges identified by the security attributes indicate the access request is permitted, the transaction is allowed to proceed. The security attributes of the initiator scheme provides a modular, consistent secure access enforcement scheme across system designs.Type: ApplicationFiled: June 13, 2014Publication date: October 2, 2014Inventors: Manoj R. Sastry, Ioannis T. Schoinas, Daniel M. Cermak
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Publication number: 20140282819Abstract: Method, apparatus, and system for qualifying CPU transactions with security attributes. Immutable security attributes are generated for transactions initiator by a CPU or processor core that identifying the execution mode of the CPU/core being trusted or untrusted. The transactions may be targeted to an Input/Output (I/O) device or system memory via which a protected asset may be accessed. Policy enforcement logic blocks are implemented at various points in the apparatus or system that allow or deny transactions access to protected assets based on the immutable security attributes generated for the transactions. In one aspect, a multiple-level security scheme is implemented under which a mode register is updated via a first transaction to indicate the CPU/core is operating in a trusted execution mode, and security attributes are generated for a second transaction using execution mode indicia in the mode register to verify the transaction is from a trusted initiator.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Inventors: Manoj R. Sastry, Ioannis T. Schoinas, Daniel M. Cermak
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Patent number: 8789170Abstract: A method and system for enforcing access control to system resources and assets. Security attributes associated with devices that initiate transactions in the system are automatically generated and forwarded with transaction messages. The security attributes convey access privileges assigned to each initiator. One or more security enforcement mechanisms are implemented in the system to evaluate the security attributes against access policy requirements to access various system assets and resources, such as memory, registers, address ranges, etc. If the privileges identified by the security attributes indicate the access request is permitted, the transaction is allowed to proceed. The security attributes of the initiator scheme provides a modular, consistent secure access enforcement scheme across system designs.Type: GrantFiled: September 24, 2010Date of Patent: July 22, 2014Assignee: Intel CorporationInventors: Manoj R. Sastry, Ioannis T. Schoinas, Daniel M. Cermak
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Publication number: 20120079590Abstract: A method and system for enforcing access control to system resources and assets. Security attributes associated with devices that initiate transactions in the system are automatically generated and forwarded with transaction messages. The security attributes convey access privileges assigned to each initiator. One or more security enforcement mechanisms are implemented in the system to evaluate the security attributes against access policy requirements to access various system assets and resources, such as memory, registers, address ranges, etc. If the privileges identified by the security attributes indicate the access request is permitted, the transaction is allowed to proceed. The security attributes of the initiator scheme provides a modular, consistent secure access enforcement scheme across system designs.Type: ApplicationFiled: September 24, 2010Publication date: March 29, 2012Inventors: Manoj R. Sastry, Ioannis T. Schoinas, Daniel M. Cermak
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Patent number: 8065685Abstract: Systems, methods and apparatuses for embodiments of a transformation engine for structured documents are disclosed. More specifically, instruction code may be generated by a compiler from transformation instructions for a structured document. Embodiments of the transformation engine may comprise hardware circuitry operable to execute the instruction code to process a structured document according to the transformation instructions such that output for an output document is generated.Type: GrantFiled: April 27, 2006Date of Patent: November 22, 2011Assignee: Intel CorporationInventors: Daniel M. Cermak, Howard Tsoi, John E. Derrick, Richard Trujillo, Udi Kalekin, Bryan Dobbs, Ying Fai Tong, Brendon D. Cahoon, Jack K. Matheson
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Publication number: 20090106775Abstract: Systems, methods and apparatuses for embodiments of a transformation engine for structured documents are disclosed. More specifically, instruction code may be generated by a compiler from transformation instructions for a structured document. Embodiments of the transformation engine may comprise hardware circuitry operable to execute the instruction code to process a structured document according to the transformation instructions such that output for an output document is generated.Type: ApplicationFiled: April 27, 2006Publication date: April 23, 2009Inventors: Daniel M. Cermak, Howard P. Tsoi, John E. Derrick, Richard Trujillo, Udi Kalekin, Bryan Dobbs, Ying Fai Tong, Brendon D. Cahoon, Jack K. Matheson
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Patent number: 7437666Abstract: An apparatus comprises a stylesheet compiler and a document processor. The stylesheet compiler is configured to identify expressions in a stylesheet and is configured to generate one or more expression trees representing the expressions. Expressions having one or more common nodes are represented as children of a subtree that represents the common nodes. Coupled to receive a document and the expression tree, the document processor is configured to evaluate the expressions represented in the one or more expression trees against the document.Type: GrantFiled: July 12, 2004Date of Patent: October 14, 2008Assignee: Intel CorporationInventors: Karempudi V. Ramarao, Richard P. Trujillo, Daniel M. Cermak
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Patent number: 7328403Abstract: Numerous embodiments of structured data transformation are disclosed. Some embodiments include characterizing at least a portion of an expression in a stylesheet as evaluatable at a phase wherein the phase is one of a compile phase, a parse phase, or a transformation phase of applying the stylesheet to a document to transform the document in a document transformation appliance, applying at least a portion of the expression to the document in the phase determined in the characterizing, combining results from applying the at least a portion of the expression and from applying other expressions to the document to generate a transformed document, and outputting the transformed document or saving the transformed document to memory.Type: GrantFiled: July 12, 2004Date of Patent: February 5, 2008Assignee: Intel CorporationInventors: Karempudi V. Ramarao, Richard P. Trujillo, Daniel M. Cermak