Patents by Inventor Daniel M. Kuchta

Daniel M. Kuchta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6798953
    Abstract: A structure that includes a substrate, typically a semiconductor chip such as a VCSEL or photodetector chip, and a guide for aligning a signal conveying device, typically an optical fiber, to a transducer such as an optoelectronic device on the semiconductor chip. The guide is formed, in a preferred embodiment, by lithographically exposing and developing a thick layer of photoresist. The structure is assembled by placing and securing the signal conveying device into a cavity-like region of the guide.
    Type: Grant
    Filed: January 7, 2000
    Date of Patent: September 28, 2004
    Assignee: International Business Machines Corporation
    Inventors: Mitchell S. Cohen, Michael J. Cordes, Steven A. Cordes, William K. Hogan, Glen W. Johnson, Daniel M. Kuchta, Dianne L. Lacey, James L. Speidell, Jeannine M. Trewhella, Joseph P. Zinter
  • Publication number: 20040096147
    Abstract: An information processing system, comprising a plurality of processors, each having at least one optical fiber input and at least one optical fiber output; a controller having at least one optical fiber input and at least one fiber output; a plurality of fibers, bundled for transmitting information; and a fiber bundle redriver, coupled to the controller, having an input channel and an output channel, for simultaneously redriving an optical signal received from any selected one of the plurality of input fibers onto substantially all of the plurality of output fibers, wherein the at least one fiber output of each of the plurality of processors and the at least one fiber output of said controller are respectively coupled to the input channel of the fiber bundle redriver, and the at least one fiber input of each of said plurality of processors and the at least one fiber input of said controller are respectively coupled to the output channel of the fiber bundle redriver.
    Type: Application
    Filed: November 15, 2002
    Publication date: May 20, 2004
    Applicant: International Business Machines Corporation
    Inventors: Blake G. Fitch, Robert S. Germain, Glen W. Johnson, Daniel M. Kuchta, Jeannine M. Trewhella
  • Patent number: 6549310
    Abstract: A diagnostic system utilizes a monitor photodiode and a laser from a fiber optic data link transceiver to perform diagnostic measurements on the fiber optic data link. The diagnostic system includes a multiplexer connected between the encoder and the laser driver of the fiber optic data link. The multiplexer is controlled by a normal op/test mode selector and receives a pulse or pattern for the test mode from a pulse/pattern generator. A signal from the monitor photodiode flows into a pulse/pattern detection circuit which signals a register if a pattern is found. After a reflected pulse is detected, the register captures a count and forwards it to a service processor or system to be analyzed.
    Type: Grant
    Filed: January 8, 1999
    Date of Patent: April 15, 2003
    Assignee: International Business Machines Corporation
    Inventors: Daniel M. Kuchta, Albert X. Widmer
  • Patent number: 6273400
    Abstract: The present invention is a structure and method to reduce the inductance of the AC test signal path used for testing an electrical device contained within a semiconductor wafer. This extends the frequency range of testing. It enables testing the devices performance characteristics at higher frequencies than otherwise useable. It is particularly directed for testing on-wafer VCSELs. The method provides to the electrical device the characteristics of a microwave bias-tee device. An on wafer capacitor is designed into the environment of the electrical device enabling the formation and use of the three ports of a bias-tee. Preferably, the bias-tee is formed in a manner not requiring the addition of processing steps to the wafer manufacturing process. The method further provides a way to increase the capacitance of the on-wafer capacitor.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: August 14, 2001
    Assignee: International Business Machines Corporation
    Inventor: Daniel M. Kuchta
  • Patent number: 6177289
    Abstract: A monolithic semiconductor optical detector is formed on a substrate having a plurality of substantially parallel trenches etched therein. The trenches are further formed as a plurality of alternating N-type and P-type trench regions separated by pillar regions of the substrate which operate as an I region between the N and P trench regions. First and second contacts are formed on the surface of the substrate and interconnect the N-type trench regions and the P-type trench regions, respectively. Preferably, the trenches are etched with a depth comparable to an optical extinction length of optical radiation to which the detector is responsive.
    Type: Grant
    Filed: December 4, 1998
    Date of Patent: January 23, 2001
    Assignee: International Business Machines Corporation
    Inventors: John Crow, Steve Koester, Daniel M. Kuchta, Dennis L. Rogers, Devendra Sadana, Sandip Tiwari
  • Patent number: 6137158
    Abstract: Parallel optical coupling apparatus for coupling a connector attached to one end of a parallel optical cable to a receiver or transmitter array. A parallel fiber optic assembly includes a receiver or transmitter array subassembly that houses a parallel optical coupler for transferring optical signals from an array of sources (e.g., lasers) in the assembly to the connector, or from the connector to an array of receiving elements in the assembly. A connector shell is provided that properly aligns the connector with respect to the optical coupler array.
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: October 24, 2000
    Assignee: International Business Machines Corporation
    Inventors: Mitchell Simmons Cohen, Marco Gauvin, Glen Walden Johnson, Daniel M. Kuchta, Andre Lacerte, Nicholas Anthony Lee, Sylvain Ouimet, Stephen Louis Spanoudis, Stephane Tremblay, Jeannine Madelyn Trewhella
  • Patent number: 6111430
    Abstract: A circuit for interfacing CMOS logic devices, having an output level range associated therewith, with MESFET logic devices, having an input level range associated therewith, comprises a depletion mode MESFET device, coupled between at least one CMOS device and at least one other MESFET device, the depletion mode MESFET device limiting a current through a gate-source junction thereof such that the output level range of the at least one CMOS device is altered to be compatible with the input level range of the at least one other MESFET device.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: August 29, 2000
    Assignee: International Business Machines Corporation
    Inventors: Daniel M. Kuchta, Jungwook Yang
  • Patent number: 6013537
    Abstract: The present invention is a structure and method to reduce the inductance of the AC test signal path used for testing an electrical device contained within a semiconductor wafer. This extends the frequency range of testing. It enables testing the devices perform characteristics at higher frequencies than otherwise useable. It is particularly directed for testing on-wafer VCSELs. The method provides to the electrical device the characteristics of a microwave bias-tee device. An on wafer capacitor is designed into the environment of the electrical device enabling the formation and use of the three ports of a bias-tee. Preferably, the bias-tee is formed in a manner not requiring the addition of processing steps to the wafer manufacturing process. The method further provides a way to increase the capacitance of the on-wafer capacitor.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: January 11, 2000
    Assignee: International Business Machines Corporation
    Inventor: Daniel M. Kuchta
  • Patent number: 5891746
    Abstract: The present invention is a structure and method to reduce the inductance of the AC test signal path used for testing an electrical device contained within a semiconductor wafer. This extends the frequency range of testing. It enables testing the device's performance characteristics at higher frequencies than otherwise useable. It is particularly directed for testing on-wafer VCSELs. The method provides to the electrical device the characteristics of a microwave bias-tee device. An on wafer capacitor is designed into the environment of the electrical device enabling the formation and use of the three ports of a bias-tee. Preferably, the bias-tee is formed in a manner not requiring the addition of processing steps to the wafer manufacturing process. The method further provides a way to increase the capacitance of the on-wafer capacitor.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: April 6, 1999
    Assignee: International Business Machines Corporation
    Inventor: Daniel M. Kuchta
  • Patent number: 5781682
    Abstract: Parallel optical coupling apparatus for coupling a connector attached to one end of a parallel optical cable to a receiver or transmitter array. A parallel fiber optic assembly includes a receiver or transmitter array subassembly that houses a parallel optical coupler for transferring optical signals from an array of sources (e.g., lasers) in the assembly to the connector, or from the connector to an array of receiving elements in the assembly. A connector shell is provided that properly aligns the connector with respect to the optical coupler array.
    Type: Grant
    Filed: February 1, 1996
    Date of Patent: July 14, 1998
    Assignees: International Business Machines Corporation, Lexmark International, Inc., Minnesota Mining and Manufacturing Company
    Inventors: Mitchell Simmons Cohen, Marco Gauvin, Glen Walden Johnson, Daniel M. Kuchta, Andre Lacerte, Nicholas Anthony Lee, Sylvain Ouimet, Stephen Louis Spanoudis, Stephane Tremblay, Jeannine Madelyn Trewhella
  • Patent number: 5757027
    Abstract: The present invention is a structure and method to reduce the inductance of the AC test signal path used for testing an electrical device contained within a semiconductor wafer. This extends the frequency range of testing. It enables testing the device's performance characteristics at higher frequencies than otherwise useable. It is particularly directed for testing on-wafer VCSELs. The method provides to the electrical device the characteristics of a microwave bias-tee device. An on wafer capacitor is designed into the environment of the electrical device enabling the formation and use of the three ports of a bias-tee. Preferably, the bias-tee is formed in a manner not requiring the addition of processing steps to the wafer manufacturing process. The method further provides a way to increase the capacitance of the on-wafer capacitor.
    Type: Grant
    Filed: January 16, 1996
    Date of Patent: May 26, 1998
    Assignee: International Business Machines Corporation
    Inventor: Daniel M. Kuchta
  • Patent number: 5602668
    Abstract: An a) infrared data signal and a b) visible light signal including infrared shot noise are provided to opposite sides of a cold bandpass mirror for transmitting the infrared data signal into a light pipe and for reflecting the visible light signal into the light pipe and for transmitting the infrared shot noise through the cold bandpass mirror and away from the light pipe. Further, a first lens is situated between a) a source of the infrared data signal and b) the cold bandpass mirror, for focusing the infrared data signal onto the cold bandpass mirror to prevent its diffusion. And further, a second lens is situated between the cold bandpass mirror and the light pipe for focusing the infrared data signal and visible light into the light pipe. And further, a third lens situated between the a) source of the infrared shot noise and visible light and b) the cold bandpass mirror, for focusing the visible light signal and infrared shot noise onto the cold bandpass mirror.
    Type: Grant
    Filed: November 30, 1994
    Date of Patent: February 11, 1997
    Assignee: International Business Machines Corporation
    Inventor: Daniel M. Kuchta