Patents by Inventor Daniel M. Olsen

Daniel M. Olsen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6094200
    Abstract: An occlusion culling circuit for use in a graphics computer receives graphics primitives data including x and y coordinates for each pixel, a z depth value, and r, g, b, and a or index color data. For each group of primitives, the graphics computer scans the primitive and determines a volume which completely bounds the primitive. The z depth values for the pixels comprising the bounding volume are then compared by the occlusion culling circuit to the depths of the pixels in the already rendered primitives to determine whether any pixels in the incoming primitive are visible. If no pixels are visible, the occlusion culling circuit clears the result register and receives the next graphics primitive. If, on the other hand, one or more pixels is visible, the occlusion culling circuit completely renders the primitives bounded by the bounding volume.
    Type: Grant
    Filed: February 6, 1998
    Date of Patent: July 25, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Daniel M. Olsen, Noel D. Scott, Robert J. Casey
  • Patent number: 5949423
    Abstract: A solution to the problem of determining the degree of visibility for a bounding volume is to first sort the bounding volumes into an order in which they can be tested, after which they are rendered as if they were polygons in their own right. Prior to the testing of the next bounding volume a Bounding Volume Visibility (BVV) mode is enabled. This temporarily suspends write operations to the frame buffer and it resets a TOTAL PIXEL COUNTER and a VISIBLE PIXEL COUNTER. Then the polygon sides of the bounding volume are rendered, with each and every pixel of those polygons being checked for depth, as would be the pixels for "real" polygons. Each such pixel rendered causes an increment of the TOTAL PIXEL COUNTER, while each such pixel that meets the depth criteria in use causes an increment of the VISIBLE PIXEL COUNTER. The BVV mode is subsequently turned off, and the values of the two counters inspected. The inspecting entity may be software associated with the graphics application.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: September 7, 1999
    Assignee: Hewlett Packard Company
    Inventor: Daniel M. Olsen
  • Patent number: 5751291
    Abstract: An occlusion culling circuit for use in a graphics computer receives graphics primitives data including x and y coordinates for each pixel, a z depth value, and r, g, b, and a or index color data. For each group of primitives, the graphics computer scans the primitive and determines a volume which completely bounds the primitive. The z depth values for the pixels comprising the bounding volume are then compared by the occlusion culling circuit to the depths of the pixels in the already rendered primitives to determine whether any pixels in the incoming primitive are visible. If no pixels are visible, the occlusion culling circuit clears the result register and receives the next graphics primitive. If, on the other hand, one or more pixels is visible, the occlusion culling circuit completely renders the primitives bounded by the bounding volume.
    Type: Grant
    Filed: July 26, 1996
    Date of Patent: May 12, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Daniel M. Olsen, Noel D. Scott, Robert J. Casey