Patents by Inventor Daniel M. Pirkl

Daniel M. Pirkl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Digitally controlled pulse width modulator utilizing real time calibration
    Patent number: 8803579
    Abstract: A system and method for controlling pulse width for electronic devices in real time is disclosed. The system includes a Digital Pulse Width Modulator (DPWM), a real time calibration circuit and a delay line circuit. The real time calibration circuit is configured to ensure proper fractional delay is applied to yield correct duty cycle of the DPWM. The delay line circuit comprising a multiplexer delay line with built in decoders, modulates the pulse width for fractional clock cycle delay.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: August 12, 2014
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: David D. Moser, Daniel M. Pirkl
  • Single-event upset hardened ring oscillator
    Patent number: 8547178
    Abstract: A ring oscillator is disclosed. The ring oscillator includes a first tri-path inverter, a second tri-path inverter and a third tri-path inverter. The second tri-path inverter is connected to the first tri-path inverter. The third tri-path inverter is connected to the first and second tri-path inverters to provide feedback for oscillations.
    Type: Grant
    Filed: October 7, 2011
    Date of Patent: October 1, 2013
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Neil E. Wood, Patrick Fleming, Andrew T. Kelly, Bin Li, Daniel M. Pirkl
  • DIGITALLY CONTROLLED PULSE WIDTH MODULATOR UTILIZING REAL TIME CALIBRATION
    Publication number: 20130076420
    Abstract: A system and method for controlling pulse width for electronic devices in real time is disclosed. The system includes a Digital Pulse Width Modulator (DPWM), a real time calibration circuit and a delay line circuit. The real time calibration circuit is configured to ensure proper fractional delay is applied to yield correct duty cycle of the DPWM. The delay line circuit comprising a multiplexer delay line with built in decoders, modulates the pulse width for fractional clock cycle delay.
    Type: Application
    Filed: September 7, 2012
    Publication date: March 28, 2013
    Applicant: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: David D. Moser, Daniel M. Pirkl
  • Single-Event Upset Hardened Ring Oscillator
    Publication number: 20120154058
    Abstract: A ring oscillator is disclosed. The ring oscillator includes a first tri-path inverter, a second tri-path inverter and a third tri-path inverter. The second tri-path inverter is connected to the first tri-path inverter. The third tri-path inverter is connected to the first and second tri-path inverters to provide feedback for oscillations.
    Type: Application
    Filed: October 7, 2011
    Publication date: June 21, 2012
    Inventors: Neil E. Wood, Andrew T. Kelly, Bin Li, Daniel M. Pirkl