Abstract: Intubation devices, systems, and methods in which the risk of leakage of nasopharyngeal secretions, esophageal reflux, and blood is reduced, or eliminated, by means of a backflow pressure gradient that is independent of PEEP. Contemplated configurations include (a) a flexible tube for the controlled delivery of air and other gases to the lungs, (b) distal and proximal inflatable seals that can close the annular space surrounding the tube, (c) means to inflate the seals, and (d) means to deliver gas under pressure to the annular chamber in between the two seals. Further configurations further comprise a processor and sensors, and methods are provided for automated backflow of contaminated fluids.

Abstract: Intubation devices, systems, and methods in which the risk of leakage of nasopharyngeal secretions, esophageal reflux, and blood is reduced, or eliminated, by means of a backflow pressure gradient that is independent of PEEP. Contemplated configurations include (a) a flexible tube for the controlled delivery of air and other gases to the lungs, (b) distal and proximal inflatable seals that can close the annular space surrounding the tube, (c) means to inflate the seals, and (d) means to deliver gas under pressure to the annular chamber in between the two seals. Further configurations further comprise a processor and sensors, and methods are provided for automated backflow of contaminated fluids.

Abstract: Capabilities are added to a Hardware Verification Language that facilitates the generation of test data. Random number sources, called random variables, can be produced by adding a randomness attribute to a variable declaration of a class definition. A “randomize” method call to a class instance produces a random value for each random variable. Constraint blocks, of a class definition, control random variables with constraint expressions. Dependency, of random variable value assignment, as determined by constraint expressions, can be expressed by a DAG. A constraint expression is converted into ranges of permissible values, from which a value is randomly chosen by a randomize method. A “boundary” method call sequentially selects a combination of boundary values, for each random variable, from each random variable's set of ranges. Coordinated selection of a boundary values permits all combinations of boundary values to be produced through successive boundary calls.

Abstract: The present invention adds capabilities to a Hardware Verification Language (HVL) which facilitate the generation of random test data. Sources of random numbers are easily produced by simply adding a randomness attribute to a variable declaration of a class definition. Such variables are called random variables. A “randomize” method call may be made to an instance of the class definition to produce random values for each random variable. The values assigned to random variables are controlled using constraint blocks, which are part of the class definition. A constraint block is comprised of constraint expressions. The constraint expressions may impose a linear ordering in which random variable values must be assigned and this dependency is expressed by directed acyclic graphs (DAGs). The constraint expressions constraining each random variable are converted into ranges of permissible values from which a value is chosen at random.

Abstract: The present invention adds capabilities to a Hardware Verification Language (HVL) which facilitate the generation of random test data. Sources of random numbers are easily produced by simply adding a randomness attribute to a variable declaration of a class definition. Such variables are called random variables. A “randomize” method call may be made to an instance of the class definition to produce random values for each random variable. The values assigned to random variables are controlled using constraint blocks, which are part of the class definition. A constraint block is comprised of constraint expressions, where each constraint expression limits the values that can be assigned to a random variable on the left-hand-side (lhs) of the constraint expression. If a constraint block of an instance is active or ON, then all the constraint expressions in the block will act to constrain their lhs random variable.

Abstract: The present invention adds capabilities to a Hardware Verification Language (HVL) which facilitate the generation of random test data. Sources of random numbers are easily produced by simply adding a randomness attribute to a variable declaration of a class definition. Such variables are called random variables. A “randomize” method call may be made to an instance of the class definition to produce random values for each random variable. The values assigned to random variables are controlled using constraint blocks, which are part of the class definition. A constraint block is comprised of constraint expressions, where each constraint expression limits the values that can be assigned to a random variable on the left-hand-side (lhs) of the constraint expression. A constraint_expression can constrain any random variable which has been declared at its level in the class hierarchy, or at any higher level.

Abstract: Hardware Verification Languages (HVLs) permit the convenient modeling of the environment for a device under test (DUT). HVLs permit the DUT to be tested by stimulating certain inputs of the DUT and monitoring the resulting states of the DUT. The present invention relates to an HVL, referred to as Vera, for the verification of any form of digital circuit design. Vera is preferably used for testing a DUT modeled in a high-level hardware description language (HLHDL) such as Verilog HDL. More specifically, the present invention relates to an HVL capability, know as an “expect,” for monitoring the values at certain nodes of the DUT at certain times and for determining whether those values are in accordance with the DUT's expected performance.

Abstract: The present invention adds capabilities to a Hardware Verification Language (HVL) which facilitate the generation of random test data. Sources of random numbers are easily produced by simply adding a randomness attribute to a variable declaration of a class definition. Such variables are called random variables. A “randomize” method call may be made to an instance of the class definition to produce random values for each random variable. The values assigned to random variables are controlled using constraint blocks, which are part of the class definition. A constraint block is comprised of constraint expressions, where each constraint expression limits the values that can be assigned to a random variable on the left-hand-side (lhs) of the constraint expression. Because random variables may also appear on the right-hand-side (rhs) of a constraint expression there is an ordering in which random variable values must be assigned and this dependency is expressed by directed acyclic graphs (DAGs).

Abstract: The present invention adds capabilities to a Hardware Verification Language (HVL) which facilitate the monitoring of a device under test (DUT). The HVL language supports Object-Oriented Programming (or OOP). Within this OOP framework, the present invention provides a monitoring facility comprised of three main stages: i) Coverage Definitions, ii) Coverage Instantiation and Triggering and iii) Coverage Feedback. A coverage definition is very similar to an OOP class definition, but does not contain methods or variables. Instead, the basic purpose of a coverage definition is to declare “monitor bins” in terms of a state variable. Essentially, each monitor bin declaration has a unique bin name which is associated with a particular behavior of the state variable and the unique bin name is used to record the state variable's behavior. Instantiation of a coverage definition produces a coverage instance.

Abstract: The present invention adds capabilities to a Hardware Verification Language (HVL) which facilitate the monitoring of a device under test (DUT). The HVL language supports Object-Oriented Programming (or OOP). Within this OOP framework, the present invention provides a monitoring facility comprised of three main stages: i) Coverage Definitions, ii) Coverage Instantiation and Triggering and iii) Coverage Feedback.