Patents by Inventor Daniel Meacham

Daniel Meacham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240079955
    Abstract: A switched-capacitor DC-DC converter circuit may convert an input voltage into a desired output voltage level. A comparator may compare a desired voltage level to a divided version of the output voltage. A fully digital control circuit comprising a frequency divider circuit, a counter circuit, a digital control logic circuit and a gain selection circuit may generate a gain value, and a phase generator may convert the gain value into clock phase signals and control settings to control a switch array to select capacitors to produce a desired output voltage.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 7, 2024
    Applicant: Microchip Technology Incorporated
    Inventors: Ajay Kumar, Paul Walker, Ibiyemi Omole, Daniel Meacham, Arvind Madan, Santosh Patel
  • Patent number: 11882147
    Abstract: A system and method are disclosed wherein a risk score is generated by interrogating multiple sources of information across a network. The information is aggregated, such that every network action for individuals and organizations are turned into a unique behavioral model, which can be used as a unique identifier (“fingerprint”). This fingerprint is in turn used by a personalized Trust Guardian System to block, modify and/or allow network actions.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: January 23, 2024
    Assignee: Lyft, Inc.
    Inventors: Mark Adams, Daniel Meacham, Simon Meacham
  • Patent number: 11853096
    Abstract: A curvature compensated bandgap circuit that is capable of matching best-in-class two (2) parts-per-million performance without over-temperature trimming. This improves performance metrics for precision voltage reference products without requiring individual device tuning during production thereof. A core bandgap circuit comprises a main operational amplifier having a second order bowed voltage response over temperature. A ptat circuit is coupled to the core bandgap circuit to provide a sigmoidal third order shape for the bandgap voltage.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: December 26, 2023
    Assignee: Microchip Technology Incorporated
    Inventors: Michael Harris, Daniel Meacham
  • Publication number: 20210051170
    Abstract: A system and method are disclosed wherein a risk score is generated by interrogating multiple sources of information across a network. The information is aggregated, such that every network action for individuals and organizations are turned into a unique behavioral model, which can be used as a unique identifier (“fingerprint”). This fingerprint is in turn used by a personalized Trust Guardian System to block, modify and/or allow network actions.
    Type: Application
    Filed: June 26, 2020
    Publication date: February 18, 2021
    Inventors: Mark ADAMS, Daniel MEACHAM, Simon MEACHAM
  • Patent number: 10728275
    Abstract: A system and method are disclosed wherein a risk score is generated by interrogating multiple sources of information across a network. The information is aggregated, such that every network action for individuals and organizations are turned into a unique behavioral model, which can be used as a unique identifier (“fingerprint”). This fingerprint is in turn used by a personalized Trust Guardian System to block, modify and/or allow network actions.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: July 28, 2020
    Assignee: Lyft Inc.
    Inventors: Mark Adams, Daniel Meacham, Simon Meacham
  • Publication number: 20180309782
    Abstract: A system and method are disclosed wherein a risk score is generated by interrogating multiple sources of information across a network. The information is aggregated, such that every network action for individuals and organizations are turned into a unique behavioral model, which can be used as a unique identifier (“fingerprint”). This fingerprint is in turn used by a personalized Trust Guardian System to block, modify and/or allow network actions.
    Type: Application
    Filed: March 15, 2018
    Publication date: October 25, 2018
    Applicant: Trust Networks Inc.
    Inventors: Mark ADAMS, Daniel MEACHAM, Simon MEACHAM
  • Patent number: 8791844
    Abstract: A circuit in an analog-to-digital converter (ADC) includes an amplifier configured to receive an output of a backend DAC; a harmonic distortion correction circuit (HDC) coupled to the amplifier and configured to correct distortion components due to the residue amplifier present in a digital signal from the backend ADC, the HDC circuit providing an output to an adder, the adder receiving a coarse digital output from a coarse ADC; and a DAC noise cancellation circuit (DNC) configured to provide an output to the adder, wherein the DNC circuit is configured to correct distortion components due to the DAC present in the digital signal from the backend ADC; wherein the output of the adder is an ADC digital output and wherein the ADC digital output forms an input to the HDC and the DNC.
    Type: Grant
    Filed: June 6, 2012
    Date of Patent: July 29, 2014
    Assignee: Microchip Technology Incorporated
    Inventors: Daniel Meacham, Andrea Panigada, Jorge Grilo
  • Patent number: 8674863
    Abstract: An input circuit for an analog-to-digital converter (ADC) includes at least one bootstrap circuit, including at least one first switch for connecting electrical power to a first terminal of at least one capacitor; at least one second switch for connecting a second terminal of the at least one capacitor to a signal to be sampled; at least one third switch for connecting the first terminal of the at least one capacitor to the control gate of at least one sampling network input switch; at least one fourth switch for connecting the at least one sampling network input switch to a substrate; and at least one fifth switch for connecting the second terminal of the at least one capacitor to the substrate.
    Type: Grant
    Filed: June 6, 2012
    Date of Patent: March 18, 2014
    Assignee: Microchip Technology Incorporated
    Inventors: Jorge Grilo, Daniel Meacham, Andrea Panigada
  • Patent number: 8643522
    Abstract: A system including a sample-and-hold circuit for receiving a plurality of analog input signals; an analog-to-digital converter for converting each of the analog inputs to a digital signal; and a processor configured for implementing fractional delay recovery for the analog-to-digital converter. In some embodiments, the fractional delay recovery includes converting each of the plurality of analog input signals to a digital version in the predetermined order; upsampling each digital version in the predetermined order; digitally filtering each upsampled value in the predetermined order; and downsampling each filtered value in the predetermined order.
    Type: Grant
    Filed: June 6, 2012
    Date of Patent: February 4, 2014
    Assignee: Microchip Technology Incorporated
    Inventors: Andrea Panigada, Jorge Grilo, Daniel Meacham
  • Patent number: 8497789
    Abstract: A pipeline ADC is provided in which a DEM function and summation of sequences occur within a flash ADC. According to various aspects of the present disclosure, embedding the processing functions needed for DAC and amplifier error correction with the circuitry of a coarse ADC and rearranging the digital calibration blocks HDC and DNC ensures accurate estimation of the errors.
    Type: Grant
    Filed: June 6, 2012
    Date of Patent: July 30, 2013
    Assignee: Microchip Technology Incorporated
    Inventors: Daniel Meacham, Andrea Panigada, Jorge Grilo
  • Publication number: 20130027231
    Abstract: A circuit in an analog-to-digital converter (ADC) includes an amplifier configured to receive an output of a backend DAC; a harmonic distortion correction circuit (HDC) coupled to the amplifier and configured to correct distortion components due to the residue amplifier present in a digital signal from the backend ADC, the HDC circuit providing an output to an adder, the adder receiving a coarse digital output from a coarse ADC; and a DAC noise cancellation circuit (DNC) configured to provide an output to the adder, wherein the DNC circuit is configured to correct distortion components due to the DAC present in the digital signal from the backend ADC; wherein the output of the adder is an ADC digital output and wherein the ADC digital output forms an input to the HDC and the DNC.
    Type: Application
    Filed: June 6, 2012
    Publication date: January 31, 2013
    Inventors: Daniel Meacham, Andrea Panigada, Jorge Grilo
  • Publication number: 20130009797
    Abstract: An input circuit for an analog-to-digital converter (ADC) includes at least one bootstrap circuit, including at least one first switch for connecting electrical power to a first terminal of at least one capacitor; at least one second switch for connecting a second terminal of the at least one capacitor to a signal to be sampled; at least one third switch for connecting the first terminal of the at least one capacitor to the control gate of at least one sampling network input switch; at least one fourth switch for connecting the at least one sampling network input switch to a substrate; and at least one fifth switch for connecting the second terminal of the at least one capacitor to the substrate.
    Type: Application
    Filed: June 6, 2012
    Publication date: January 10, 2013
    Inventors: Jorge Grilo, Daniel Meacham, Andrea Panigada
  • Publication number: 20130002460
    Abstract: A system including a sample-and-hold circuit for receiving a plurality of analog input signals; an analog-to-digital converter for converting each of the analog inputs to a digital signal; and a processor configured for implementing fractional delay recovery for the analog-to-digital converter. In some embodiments, the fractional delay recovery includes converting each of the plurality of analog input signals to a digital version in the predetermined order; upsampling each digital version in the predetermined order; digitally filtering each upsampled value in the predetermined order; and downsampling each filtered value in the predetermined order.
    Type: Application
    Filed: June 6, 2012
    Publication date: January 3, 2013
    Inventors: Andrea Panigada, Jorge Grilo, Daniel Meacham
  • Publication number: 20130002459
    Abstract: A pipeline ADC is provided in which a DEM function and summation of sequences occur within a flash ADC. According to various aspects of the present disclosure, embedding the processing functions needed for DAC and amplifier error correction with the circuitry of a coarse ADC and rearranging the digital calibration blocks HDC and DNC ensures accurate estimation of the errors.
    Type: Application
    Filed: June 6, 2012
    Publication date: January 3, 2013
    Inventors: Daniel Meacham, Andrea Panigada, Jorge Grilo
  • Publication number: 20030196240
    Abstract: A versatile beach wrap, that closes securely allowing for garments to be removed and exchanged, the length of which can be adjusted, with a hood and fits into its own backpack for carrying.
    Type: Application
    Filed: April 22, 2002
    Publication date: October 23, 2003
    Inventors: Daniel Meacham, Max M. Stern