Abstract: A heterogeneous semiconductor structure, including a first integrated circuit and a second integrated circuit, the second integrated circuit being a photonic integrated circuit. The heterogeneous semiconductor structure may be fabricated by bonding a multi-layer source die, in a flip-chip manner, to the first integrated circuit, removing the substrate of the source die, and fabricating one or more components on the source die, using etch and/or deposition processes, to form the second integrated circuit. The second integrated circuit may include components fabricated from cubic phase gallium nitride compounds, and configured to operate at wavelengths shorter than 450 nm.

Abstract: A heterogeneous semiconductor structure, including a first integrated circuit and a second integrated circuit, the second integrated circuit being a photonic integrated circuit. The heterogeneous semiconductor structure may be fabricated by bonding a multi-layer source die, in a flip-chip manner, to the first integrated circuit, removing the substrate of the source die, and fabricating one or more components on the source die, using etch and/or deposition processes, to form the second integrated circuit. The second integrated circuit may include components fabricated from cubic phase gallium nitride compounds, and configured to operate at wavelengths shorter than 450 nm.

Abstract: A method for providing a vertical optical via for a semiconductor substrate is described. The semiconductor substrate has a front surface and a back side. A hard mask having an aperture therein is formed on the front surface. Part of the semiconductor substrate exposed by the aperture is removed to form a via hole. The via hole has a width not exceeding one hundred micrometers and a bottom. Cladding layer(s) and core layer(s) are provided in the via hole. The core layer(s) have at least a second index of refraction greater than that of the core layer(s). A portion of the semiconductor substrate including the back side is removed to expose a bottom portion of the core layer(s) and a bottom surface of the semiconductor substrate. The vertical optical via includes the cladding and core layers. The vertical optical via extends from the front surface to the bottom surface.

Abstract: A heterogeneous semiconductor structure, including a first integrated circuit and a second integrated circuit, the second integrated circuit being a photonic integrated circuit. The heterogeneous semiconductor structure may be fabricated by bonding a multi-layer source die, in a flip-chip manner, to the first integrated circuit, removing the substrate of the source die, and fabricating one or more components on the source die, using etch and/or deposition processes, to form the second integrated circuit. The second integrated circuit may include components fabricated from cubic phase gallium nitride compounds, and configured to operate at wavelengths shorter than 450 nm.

Abstract: A method for providing a vertical optical via for a semiconductor substrate is described. The semiconductor substrate has a front surface and a back side. A hard mask having an aperture therein is formed on the front surface. Part of the semiconductor substrate exposed by the aperture is removed to form a via hole. The via hole has a width not exceeding one hundred micrometers and a bottom. Cladding layer(s) and core layer(s) are provided in the via hole. The core layer(s) have at least a second index of refraction greater than that of the core layer(s). A portion of the semiconductor substrate including the back side is removed to expose a bottom portion of the core layer(s) and a bottom surface of the semiconductor substrate. The vertical optical via includes the cladding and core layers. The vertical optical via extends from the front surface to the bottom surface.

Abstract: A method for providing a vertical optical via for a semiconductor substrate is described. The semiconductor substrate has a front surface and a back side. A hard mask having an aperture therein is formed on the front surface. Part of the semiconductor substrate exposed by the aperture is removed to form a via hole. The via hole has a width not exceeding one hundred micrometers and a bottom. Cladding layer(s) and core layer(s) are provided in the via hole. The core layer(s) have at least a second index of refraction greater than that of the core layer(s). A portion of the semiconductor substrate including the back side is removed to expose a bottom portion of the core layer(s) and a bottom surface of the semiconductor substrate. The vertical optical via includes the cladding and core layers. The vertical optical via extends from the front surface to the bottom surface.

Abstract: A heterogeneous semiconductor structure, including a first integrated circuit and a second integrated circuit, the second integrated circuit being a photonic integrated circuit. The heterogeneous semiconductor structure may be fabricated by bonding a multi-layer source die, in a flip-chip manner, to the first integrated circuit, removing the substrate of the source die, and fabricating one or more components on the source die, using etch and/or deposition processes, to form the second integrated circuit. The second integrated circuit may include components fabricated from cubic phase gallium nitride compounds, and configured to operate at wavelengths shorter than 450 nm.

Abstract: An apparatus for a beam steering device includes a rotator constituting a cylindrical body extending along an axis and defining a central passage therethrough. A wedge-shaped prism is secured to the body within the central passage. The prism has a first surface extending perpendicular to the axis and a second surface extending transverse to the axis. A drive member is provided on one of an axial end surface and a radially outer surface of the body for rotating the rotator. An encoder member is provided on the same surface of the body as the drive member for tracking the position of the rotator.

Abstract: A method for providing a vertical optical via for a semiconductor substrate is described. The semiconductor substrate has a front surface and a back side. A hard mask having an aperture therein is formed on the front surface. Part of the semiconductor substrate exposed by the aperture is removed to form a via hole. The via hole has a width not exceeding one hundred micrometers and a bottom. Cladding layer(s) and core layer(s) are provided in the via hole. The core layer(s) have at least a second index of refraction greater than that of the core layer(s). A portion of the semiconductor substrate including the back side is removed to expose a bottom portion of the core layer(s) and a bottom surface of the semiconductor substrate. The vertical optical via includes the cladding and core layers. The vertical optical via extends from the front surface to the bottom surface.

Abstract: A heterogeneous semiconductor structure, including a first integrated circuit and a second integrated circuit, the second integrated circuit being a photonic integrated circuit. The heterogeneous semiconductor structure may be fabricated by bonding a multi-layer source die, in a flip-chip manner, to the first integrated circuit, removing the substrate of the source die, and fabricating one or more components on the source die, using etch and/or deposition processes, to form the second integrated circuit. The second integrated circuit may include components fabricated from cubic phase gallium nitride compounds, and configured to operate at wavelengths shorter than 450 nm.

Abstract: A method for integrating heterogeneous elements with elements residing on a target wafer is described. A source die including a compound semiconductor substrate, an etch stop layer and at least one active semiconductor element is provided. The etch stop layer is between the active semiconductor element(s) and the substrate. The etch stop layer is resistant to a plasma etch for the substrate. A bonding agent is provided on a surface of the target wafer. The source die is aligned to and placed on the part of the surface of the target wafer such that the active semiconductor element(s) are between the target wafer's surface and the substrate. The bonding agent is between the source die and the surface of the target wafer. The source die is bonded to the target wafer using the bonding agent. The substrate of the source die is removed, the removal includes performing the plasma etch.

Abstract: A beam steering device includes a housing and a transceiver that emits and receives light beams through at least one opening in the housing. A rotator includes a cylindrical body rotatably mounted within the housing axially between the transceiver and the at least one opening. A wedge-shaped prism is secured within the body and includes a first surface extending perpendicular to the axis and a second surface extending transverse to the axis. An encoder member and a drive member are provided on an outer surface of the body. Sensors are mounted to the housing to sense the encoder member and provide an encoder signal indicative of a rotational position of the prism about the axis. At least one drive element is mounted to the housing and applies force to the drive member to rotate the body and prism about the axis for steering light beams propagating through the prism.

Abstract: An apparatus for a beam steering device includes a rotator constituting a cylindrical body extending along an axis and defining a central passage therethrough. A wedge-shaped prism is secured to the body within the central passage. The prism has a first surface extending perpendicular to the axis and a second surface extending transverse to the axis. A drive member is provided on one of an axial end surface and a radially outer surface of the body for rotating the rotator. An encoder member is provided on the same surface of the body as the drive member for tracking the position of the rotator.

Abstract: A beam steering device includes a housing and a transceiver that emits and receives light beams through at least one opening in the housing. A rotator includes a cylindrical body rotatably mounted within the housing axially between the transceiver and the at least one opening. A wedge-shaped prism is secured within the body and includes a first surface extending perpendicular to the axis and a second surface extending transverse to the axis. An encoder member and a drive member are provided on an outer surface of the body. Sensors are mounted to the housing to sense the encoder member and provide an encoder signal indicative of a rotational position of the prism about the axis. At least one drive element is mounted to the housing and applies force to the drive member to rotate the body and prism about the axis for steering light beams propagating through the prism.

Abstract: An integrated circuit device includes a semiconductor substrate with a top surface, a bottom surface opposite the top surface and an intermediate portion positioned between the top and bottom surfaces. The device also includes interior substrate surfaces defined by at least one void extending from the bottom surface to the intermediate portion.

Abstract: One embodiment of an integrated circuit device includes a semiconductor substrate with a top surface, a bottom surface opposite said top surface and an intermediate portion positioned between the top and bottom surfaces. The device also includes interior substrate surfaces defined by at least one void extending from the bottom surface to the intermediate portion.

Abstract: A method for growing germanium epitaxial films is disclosed. Initially, a silicon substrate is preconditioned with hydrogen gas. The temperature of the preconditioned silicon substrate is then decreased, and germane gas is flowed over the preconditioned silicon substrate to form an intrinsic germanium seed layer. Next, a mixture of germane and phosphine gases can be flowed over the intrinsic germanium seed layer to produce an n-doped germanium seed layer. Otherwise, a mixture of diborane and germane gases can be flowed over the intrinsic germanium seed laser to produce a p-doped germanium seed layer. At this point, a bulk germanium layer can be grown on top of the doped germanium seed layer.

Abstract: A method for growing germanium epitaxial films is disclosed. Initially, a silicon substrate is preconditioned with hydrogen gas. The temperature of the preconditioned silicon substrate is then decreased, and germane gas is flowed over the preconditioned silicon substrate to form an intrinsic germanium seed layer. Next, a mixture of germane and phosphine gases can be flowed over the intrinsic germanium seed layer to produce an n-doped germanium seed layer. Otherwise, a mixture of diborane and germane gases can be flowed over the intrinsic germanium seed layer to produce a p-doped germanium seed layer. At this point, a bulk germanium layer can be grown on top of the doped germanium seed layer.

Abstract: A system is provided for the manufacture of carbon based electrical components including, an ultraviolet light source; a substrate receiving unit whereby a substrate bearing a first layer of carbon based semiconductor is received and disposed beneath the ultraviolet light source; a mask disposed between the ultraviolet light source and the carbon based semiconductor layer; a doping agent precursor source; and environmental chemical controls, configured such that light from the ultraviolet light source irradiates a doping agent precursor and the first carbon layer.

Abstract: A method is provided for the integration of an optical gain material into a Complementary metal oxide semiconductor device, the method comprising the steps of: configuring a workpiece from a silicon wafer upon which is disposed an InP wafer bearing an epitaxy layer; mechanically removing the InP substrate; etching the InP remaining on epitaxy layer with hydrochloric acid; depositing at least one Oxide pad on revealed the epitaxy layer; using the Oxide pad as a mask during a first pattern etch removing the epitaxy to an N level; etching with a patterned inductively coupled plasma (ICP) technique; isolating the device on the substrate with additional pattern etching patterning contacts, applying the contacts.