Patents by Inventor Daniel P. Cram
Daniel P. Cram has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7439752Abstract: The invention includes methods of utilizing removable mechanical precising mechanisms and/or optical-based precising mechanisms to align chips within sockets. The sockets can be configured so that compression of the sockets opens a clamping mechanism. A chip can be placed within a socket with a manipulator and aligned during compression of the socket. Subsequently, the compression of the socket can be released while the manipulator remains in contact with the chip to hold the chip in place until the clamping mechanism is retaining the chip in the socket. The chip can then be released from the manipulator. The invention also includes systems for utilizing removable nests to align various chip geometries within generic socket designs.Type: GrantFiled: May 3, 2006Date of Patent: October 21, 2008Assignee: Micron Technology, Inc.Inventors: Daniel P. Cram, A. Jay Stutzman
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Patent number: 7427869Abstract: Carriers comprising a carrier body having a plurality of openings holding a plurality of resilient contact probes are disclosed. A number of different embodiments for the resilient contact probes is also disclosed. The carriers of the present invention may be secured to an interface board (i.e., a printed circuit board (PCB)) and assembled with a substrate (e.g., a wafer having integrated circuitry thereon, a PCB, etc.). The resilient contact probes electrically contact the terminal pads of the interface board and the electrical contacts of the substrate to enable electrical testing of the substrate. The configuration of the resilient contact probes, in combination with the carrier body, enables preferential, high mechanical loading of the terminal pads with controlled, predictable loading of the electrical contacts. Methods of making and use are also disclosed, as are a plurality of embodiments of resilient contact probes.Type: GrantFiled: July 27, 2006Date of Patent: September 23, 2008Assignee: Micron Technology, Inc.Inventors: Daniel P. Cram, Scott L. Hoagland
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Patent number: 7425839Abstract: Systems and methods for testing packaged microelectronic devices are disclosed herein. One such system for testing a packaged microelectronic device includes a test socket configured to receive the device for testing and a tester interface including a plurality of test contacts aligned with external contacts of the device when the device is received within the test socket. The system further includes a mask proximate to the test socket and the test contacts. The mask includes a plurality of apertures arranged in a pattern corresponding to the plurality of test contacts and corresponding at least in part to the array of external contacts when the device is received within the test socket. The apertures include (a) first apertures sized to allow the corresponding test contacts to extend completely through the mask, and (b) one or more second apertures sized to allow the corresponding test contacts to extend only partially through the mask.Type: GrantFiled: August 25, 2006Date of Patent: September 16, 2008Assignee: Micron Technology, Inc.Inventors: A. Jay Stutzman, Daniel P. Cram
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Publication number: 20080191728Abstract: The present disclosure includes various method, device, and system embodiments for isolation circuits. One such isolation circuit embodiment includes: a first transistor having its source connected to a first terminal, wherein the first terminal connects a supply voltage to the source of the first transistor; a register connected to the drain of the first transistor; and a second transistor in parallel with a resistor, the gate of the second transistor is connected to an output of the register and a source of the second transistor is connected to the first terminal. In various embodiments, the drain of the second transistor is connected to a second terminal and the state of the second transistor depends on whether the register is loaded.Type: ApplicationFiled: September 28, 2006Publication date: August 14, 2008Inventors: Hani S. Attalla, Daniel P. Cram
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Publication number: 20080048704Abstract: Microelectronic devices, methods for testing microelectronic devices, and detachable electrical components. One embodiment of an apparatus for testing microelectronic devices in accordance with the invention comprises a board having a primary side, a secondary side, a plurality of test sites at the primary side, and electrical lines electrically coupled to the test sites. The testing apparatus can further include a plurality of lead holes in the board. Individual lead holes have a sidewall and a conductive section plated onto the sidewall. In several embodiments, individual pairs of first and second lead holes are electrically coupled to electrical lines corresponding to an associated test site. The apparatus can further include a plurality of permanent fuses fixed to the board. Individual permanent fuses are electrically coupled to electrical lines associated with an individual test site and an individual pair of first and second lead holes.Type: ApplicationFiled: August 23, 2006Publication date: February 28, 2008Applicant: Micron Technology, Inc.Inventors: Daniel P. Cram, A. Jay Stutzman
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Publication number: 20080048694Abstract: Systems and methods for testing packaged microelectronic devices are disclosed herein. One such system for testing a packaged microelectronic device includes a test socket configured to receive the device for testing and a tester interface including a plurality of test contacts aligned with external contacts of the device when the device is received within the test socket. The system further includes a mask proximate to the test socket and the test contacts. The mask includes a plurality of apertures arranged in a pattern corresponding to the plurality of test contacts and corresponding at least in part to the array of external contacts when the device is received within the test socket. The apertures include (a) first apertures sized to allow the corresponding test contacts to extend completely through the mask, and (b) one or more second apertures sized to allow the corresponding test contacts to extend only partially through the mask.Type: ApplicationFiled: August 25, 2006Publication date: February 28, 2008Applicant: Micron Technology, Inc.Inventors: A. Jay Stutzman, Daniel P. Cram
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Patent number: 7279915Abstract: A pass through test system for testing an electronic module includes an interface board, and test contactors movably mounted to the interface board for electrically engaging terminal contacts on the module with a zero insertion force on the modules. The interface board is configured for mounting to an automated or manual pass through test handler in electrical communication with test circuitry. In a first embodiment the interface board includes test pads in electrical communication with the test circuitry, and rotatable test contactors having spring contacts configured to simultaneously engage the test pads and the terminal contacts on the module. In a second embodiment the interface board includes test pads in electrical communication with the test circuitry, and slidable test contactors having beam leads configured to simultaneously engage the test pads and the terminal contacts on the module.Type: GrantFiled: August 24, 2005Date of Patent: October 9, 2007Assignee: Micron Technology, Inc.Inventor: Daniel P. Cram
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Patent number: 7274197Abstract: Disclosed herein are exemplary embodiments of a contact system (referred to as a “Z-block”) for interfacing a semiconductor wafer to an electrical tester, and methods for making the same. In a preferred embodiment, the Z-block comprises three stacked pieces or layers: an upper and lower piece which are similar in structure, and a unique middle piece. The pieces each contain corresponding locking holes and probe pin holes. The locking holes are strategically arranged on each of the pieces to allow the stacked piece structure to be locked together at various points during its manufacture. After alignment of the probe pin holes in the various pieces, probe pins are injected into these holes. The probe pins are then aligned and locked into place by moving the middle piece relative to the upper and lower pieces. Such locking of the probe pins is accomplished through interaction of the middle piece with the shape of the probe pins, which prevents the probe pins from slipping out of the probe pin holes.Type: GrantFiled: December 12, 2006Date of Patent: September 25, 2007Assignee: Micron Technology, Inc.Inventor: Daniel P. Cram
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Patent number: 7265563Abstract: A contact system for electrically engaging semiconductor components includes an interface board mountable to an automated test handler, and a floating substrate on the interface board. The interface board includes interface contacts in electrical communication with external test circuitry. The substrate includes flexible segments, and contactors having contact pads on opposing sides of the flexible segments configured to simultaneously electrically engage terminal contacts on the components, and the interface contacts on the interface board. The contact pads include conductive polymer layers that provide an increased compliancy for the contactors. This increased compliancy allows the contactors to accommodate variations in the dimensions and planarity of the terminal contacts on the component. In addition, the substrate includes grooves between the contactors which provide electrical isolation and allow the contactors to move independently of one another.Type: GrantFiled: June 15, 2005Date of Patent: September 4, 2007Assignee: Micron Technology, Inc.Inventor: Daniel P. Cram
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Patent number: 7176702Abstract: Disclosed herein are exemplary embodiments of a contact system (referred to as a “Z-block”) for interfacing a semiconductor wafer to an electrical tester, and methods for making the same. In a preferred embodiment, the Z-block comprises three stacked pieces or layers: an upper and lower piece which are similar in structure, and a unique middle piece. The pieces each contain corresponding locking holes and probe pin holes. The locking holes are strategically arranged on each of the pieces to allow the stacked piece structure to be locked together at various points during its manufacture. After alignment of the probe pin holes in the various pieces, probe pins are injected into these holes. The probe pins are then aligned and locked into place by moving the middle piece relative to the upper and lower pieces. Such locking of the probe pins is accomplished through interaction of the middle piece with the shape of the probe pins, which prevents the probe pins from slipping out of the probe pin holes.Type: GrantFiled: April 7, 2004Date of Patent: February 13, 2007Assignee: Micron Technology, Inc.Inventor: Daniel P. Cram
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Patent number: 7135345Abstract: Improved methods and apparatus are provided for the handling and testing of semiconductor devices. One embodiment comprises a die carrier for one or more semiconductor dice having very fine pitch electrical I/O (input/output) elements. The semiconductor dice are temporarily attached to the die carrier in singulated form to enable testing the dice with conventional contact technology. The die carrier may include a flex circuit base substrate and a rigid support frame. Further embodiments comprise materials and methods for attaching the semiconductor dice to the die carrier and for providing a temporary electrical connection with the semiconductor dice during testing. Exemplary materials for providing the temporary electrical connection may comprise a conductive film or tape, a conductive or conductor-filled epoxy, resin or RTV adhesive-based materials, a water-soluble material impregnated with a conductive filler or non-reflowed solder paste.Type: GrantFiled: August 16, 2004Date of Patent: November 14, 2006Assignee: Micron Technology, Inc.Inventors: Steven L. Hamren, Daniel P. Cram
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Patent number: 7129721Abstract: Improved methods and apparatus are provided for the handling and testing of semiconductor devices. One embodiment comprises a die carrier for one or more semiconductor dice having very fine pitch electrical I/O (input/output) elements. The semiconductor dice are temporarily attached to the die carrier in singulated form to enable testing the dice with conventional contact technology. The die carrier may include a flex circuit base substrate and a rigid support frame. Further embodiments comprise materials and methods for attaching the semiconductor dice to the die carrier and for providing a temporary electrical connection with the semiconductor dice during testing. Exemplary materials for providing the temporary electrical connection may comprise a conductive film or tape, a conductive or conductor-filled epoxy, resin or RTV adhesive-based materials, a water-soluble material impregnated with a conductive filler or non-reflowed solder paste.Type: GrantFiled: August 16, 2004Date of Patent: October 31, 2006Inventors: Steven L. Hamren, Daniel P. Cram
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Patent number: 7126228Abstract: Improved methods and apparatus are provided for the handling and testing of semiconductor devices. One embodiment comprises a die carrier for one or more semiconductor dice having very fine pitch electrical I/O (input/output) elements. The semiconductor dice are temporarily attached to the die carrier in singulated form to enable testing the dice with conventional contact technology. The die carrier may include a flex circuit base substrate and a rigid support frame. Further embodiments comprise materials and methods for attaching the semiconductor dice to the die carrier and for providing a temporary electrical connection with the semiconductor dice during testing. Exemplary materials for providing the temporary electrical connection may comprise a conductive film or tape, a conductive or conductor-filled epoxy, resin or RTV adhesive-based materials, a water-soluble material impregnated with a conductive filler or non-reflowed solder paste.Type: GrantFiled: April 23, 2003Date of Patent: October 24, 2006Assignee: Micron Technology, Inc.Inventors: Steven L. Hamren, Daniel P. Cram
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Patent number: 7121860Abstract: A socket for removably mounting an electronic device and which has utility for testing of the electronic device. The socket includes pinch-style support contacts which establish a reference seating plane for an IC package. The pinch-style support contacts each include a stationary contact arm, a movable contact arm, and a terminal portion. The stationary contact arm and the movable contact arm each include a contact surface configured to contact a terminal of the IC package. The stationary contact arm additionally includes an IC package support surface and extends beyond the height of the movable contact arm. A method of supporting and electrically connecting the socket and IC package is also disclosed.Type: GrantFiled: September 2, 2004Date of Patent: October 17, 2006Assignee: Micron Technology, Inc.Inventors: Daniel P. Cram, Amos J. Stutzman
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Patent number: 7123036Abstract: A pass through test system for testing an electronic module includes an interface board, and test contactors movably mounted to the interface board for electrically engaging terminal contacts on the module with a zero insertion force on the modules. The interface board is configured for mounting to an automated or manual pass through test handler in electrical communication with test circuitry. In a first embodiment the interface board includes test pads in electrical communication with the test circuitry, and rotatable test contactors having spring contacts configured to simultaneously engage the test pads and the terminal contacts on the module. In a second embodiment the interface board includes test pads in electrical communication with the test circuitry, and slidable test contactors having beam leads configured to simultaneously engage the test pads and the terminal contacts on the module.Type: GrantFiled: October 11, 2004Date of Patent: October 17, 2006Assignee: Micron Technology, Inc.Inventor: Daniel P. Cram
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Patent number: 7122389Abstract: Improved methods and apparatus are provided for the handling and testing of semiconductor devices. One embodiment comprises a die carrier for one or more semiconductor dice having very fine pitch electrical I/O (input/output) elements. The semiconductor dice are temporarily attached to the die carrier in singulated form to enable testing the dice with conventional contact technology. The die carrier may include a flex circuit base substrate and a rigid support frame. Further embodiments comprise materials and methods for attaching the semiconductor dice to the die carrier and for providing a temporary electrical connection with the semiconductor dice during testing. Exemplary materials for providing the temporary electrical connection may comprise a conductive film or tape, a conductive or conductor-filled epoxy, resin or RTV adhesive-based materials, a water-soluble material impregnated with a conductive filler or non-reflowed solder paste.Type: GrantFiled: August 16, 2004Date of Patent: October 17, 2006Assignee: Micron Technology, Inc.Inventors: Steven L. Hamren, Daniel P. Cram
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Patent number: 7114976Abstract: A test socket (52) for a semiconductor component (12) includes a base (54), a movable lid (56), socket contacts (68) for electrically engaging terminal contacts (14) on the component (12), and a retention mechanism (74) having latches (74) actuated by movement of the lid (56) for inward and outward movement during retention and release of the component (12). Such lid (56) and latch (74) movement provides a loading/unloading position, in which the component (12) can be loaded or unloaded, and then a testing position, in which the component (12) is retained by the retention mechanism (74) in electrical communication with the socket contacts (68). The test socket (52) also includes a nest (58) for aligning the component (12), which is configured for removal or installation in the testing position of the test socket (52) while the latches (74) are in the inward or retention position.Type: GrantFiled: September 16, 2005Date of Patent: October 3, 2006Assignee: Micron Technology, Inc.Inventor: Daniel P. Cram
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Patent number: 7093622Abstract: A method for testing and burning-in semiconductor components such as semiconductor dice on a semiconductor wafer, is provided. The method includes the step of providing all of the components on the wafer with resilient contact structures, such as metal pins having integral spring segments. The resilient contact structures are used to test the components to identify functional and non-functional components. Following this test, the resilient contact structures on the non-functional components are deformed, such that electrical communication with the non-functional components is prevented in a subsequent burn-in test. This permits the burn-in test to be performed using “shared resources” test equipment. A deformation apparatus for deforming the resilient contact structures includes a deformation block configured to compress, bend or shape the resilient contact structures on the non-functional dice.Type: GrantFiled: July 16, 2004Date of Patent: August 22, 2006Assignee: Micron Technology, Inc.Inventor: Daniel P. Cram
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Patent number: 7043388Abstract: A testing system is disclosed for testing a packaged device having a body with a package profile and an array of contacts coupled to the body. In one embodiment, the system includes a socket having a receiving area and an array of leads arranged to engage the array of contacts on the packaged device. The system of this embodiment also has a package handling assembly with a placement head and an alignment element coupled to the placement head. The alignment element is movable with the placement head as a unit relative to the socket. The alignment element is positionable in the receiving area of the socket. The alignment element restricts movement of the packaged device in at least two dimensions relative to the array of leads when the packaged device is positioned in the receiving area adjacent to the array of leads.Type: GrantFiled: December 22, 2003Date of Patent: May 9, 2006Assignee: Micron Technology, Inc.Inventor: Daniel P. Cram
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Patent number: 7038475Abstract: A contact system for electrically engaging semiconductor components includes an interface board mountable to an automated test handler, and a floating substrate on the interface board. The interface board includes interface contacts in electrical communication with external test circuitry. The substrate includes flexible segments, and contactors having contact pads on opposing sides of the flexible segments configured to simultaneously electrically engage terminal contacts on the components, and the interface contacts on the interface board. The contact pads include conductive polymer layers that provide an increased compliancy for the contactors. This increased compliancy allows the contactors to accommodate variations in the dimensions and planarity of the terminal contacts on the component. In addition, the substrate includes grooves between the contactors which provide electrical isolation and allow the contactors to move independently of one another.Type: GrantFiled: September 22, 2003Date of Patent: May 2, 2006Assignee: Micron Technology, Inc.Inventor: Daniel P. Cram