Abstract: Methods and systems for enabling an approximation of true snapshot integration by lowering total power requirements, total detector bias current, integrated charge per detector and detector impedance while allowing for higher ROIC input noise through the use of microbolometer photodetectors, super-pixels, and techniques for their use are herein provided.

Abstract: A multiple resolution focal plane array, the multiple resolution focal plane array having a plurality of bolometers and a readout integrated circuit connected to the plurality of bolometers, wherein the readout integrated circuit is configured to accumulate signal-induced current collected from each bolometer during an integration interval and then transfer the resultant signal onto output taps for readout. The readout integrated circuit is configured to allow a selection between at least two bolometer configurations, a first configuration where bolometers are combined into pixels comprising N×N series/parallel groupings of bolometers and a second configuration where the bolometers are used individually, forming pixels comprising only a single bolometer.

Abstract: Methods and systems for enabling an approximation of true snapshot integration by lowering total power requirements, total detector bias current, integrated charge per detector and detector impedance while allowing for higher ROIC input noise through the use of microbolometer photodetectors, super-pixels, and techniques for their use are herein provided.

Abstract: A focal-plane array includes: an array of thermal sensors arranged in at least 120 rows and at least 160 columns, the thermal sensors being divided among three or more subarrays; and bias circuitry to concurrently pulse bias the thermal sensors of one of the rows of each of the subarrays, and to sequentially bias the rows of each of the subarrays at a rate of at least 40,000 rows per second. A readout integrated circuit includes: a sensing area to physically and electrically connect to the array of thermal sensors and includes row circuitry to perform the concurrent pulse biasing and the sequential biasing, and column circuitry to concurrently measure analog signals from the pulse-biased thermal sensors; and conversion circuitry to convert the measured analog signals to corresponding digital signals. In some embodiments, the thermal sensors are operated without cooling. In some embodiments, the rows are interleaved between the subarrays.

Abstract: An analog signal processing circuit used to suppress unipolar transient effects and signal averaging. Two transistors and one capacitor are provided in series to sample and condition an input signal. An additional transistor is provided in parallel to the capacitor to provide further signal processing capabilities. The circuit can function as an analog signal average, suppressing unipolar transient effects and as a peak detector while using a conservative amount of fabrication material and can be operated with low power.