Abstract: In an aspect, a test platform for testing an embedded control system having a plurality of interconnected components is operable to: receive, at run time, configuration data for configuring a system under test (“SUT”) representing the embedded control system, the configuration data specifying: which of the components shall be simulated versus hardware-in-the-loop (HIL) components in the SUT; and an inter-component signal mapping that maps input signals to output signals of the specified simulated or HIL components of the SUT; for each of the simulated or HIL components, automatically activate, at run time, a corresponding object code portion for simulating the embedded system component in the test platform or a corresponding object code portion for facilitating communication with the HIL component connected to the test platform, respectively; and automatically map input signals of the activated object code portions to output signals of the activated code portions according to the signal mapping.

Abstract: In an aspect, a test platform for testing an embedded control system having a plurality of interconnected components is operable to: receive, at run time, configuration data for configuring a system under test (“SUT”) representing the embedded control system, the configuration data specifying: which of the components shall be simulated versus hardware-in-the-loop (HIL) components in the SUT; and an inter-component signal mapping that maps input signals to output signals of the specified simulated or HIL components of the SUT; for each of the simulated or HIL components, automatically activate, at run time, a corresponding object code portion for simulating the embedded system component in the test platform or a corresponding object code portion for facilitating communication with the HIL component connected to the test platform, respectively; and automatically map input signals of the activated object code portions to output signals of the activated code portions according to the signal mapping.