Patents by Inventor Daniel Steckert

Daniel Steckert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8673787
    Abstract: A method of high aspect ratio contact etching a substantially vertical contact hole in an oxide layer using a hard photoresist mask is described. The oxide layer is deposited on an underlying substrate. A plasma etching gas is formed from a carbon source gas. Dopants are mixed into the gas. The doped plasma etching gas etches a substantially vertical contact hole through the oxide layer by doping carbon chain polymers formed along the sidewalls of the contact holes during the etching process into a conductive state. The conductive state of the carbon chain polymers reduces the charge buildup along sidewalls to prevent twisting of the contact holes by bleeding off the charge and ensuring proper alignment with active area landing regions. The etching stops at the underlying substrate.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: March 18, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Max F. Hineman, Daniel A. Steckert, Jingyi Bai, Shane J. Trapp, Tony Schrock
  • Publication number: 20110250759
    Abstract: A method of high aspect ratio contact etching a substantially vertical contact hole in an oxide layer using a hard photoresist mask is described. The oxide layer is deposited on an underlying substrate. A plasma etching gas is formed from a carbon source gas. Dopants are mixed into the gas. The doped plasma etching gas etches a substantially vertical contact hole through the oxide layer by doping carbon chain polymers formed along the sidewalls of the contact holes during the etching process into a conductive state. The conductive state of the carbon chain polymers reduces the charge buildup along sidewalls to prevent twisting of the contact holes by bleeding off the charge and ensuring proper alignment with active area landing regions. The etching stops at the underlying substrate.
    Type: Application
    Filed: June 21, 2011
    Publication date: October 13, 2011
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Gurtej S. Sandhu, Max F. Hineman, Daniel A. Steckert, Jingyi Bai, Shane J. Trapp, Tony Schrock
  • Patent number: 7985692
    Abstract: A method of high aspect ratio contact etching a substantially vertical contact hole in an oxide layer using a hard photoresist mask is described. The oxide layer is deposited on an underlying substrate. A plasma etching gas is formed from a carbon source gas. Dopants are mixed into the gas. The doped plasma etching gas etches a substantially vertical contact hole through the oxide layer by doping carbon chain polymers formed along the sidewalls of the contact holes during the etching process into a conductive state. The conductive state of the carbon chain polymers reduces the charge buildup along sidewalls to prevent twisting of the contact holes by bleeding off the charge and ensuring proper alignment with active area landing regions. The etching stops at the underlying substrate.
    Type: Grant
    Filed: January 23, 2008
    Date of Patent: July 26, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Max F. Hineman, Daniel A. Steckert, Jingyi Bai, Shane J. Trapp, Tony Schrock
  • Publication number: 20080128389
    Abstract: A method of high aspect ratio contact etching a substantially vertical contact hole in an oxide layer using a hard photoresist mask is described. The oxide layer is deposited on an underlying substrate. A plasma etching gas is formed from a carbon source gas. Dopants are mixed into the gas. The doped plasma etching gas etches a substantially vertical contact hole through the oxide layer by doping carbon chain polymers formed along the sidewalls of the contact holes during the etching process into a conductive state. The conductive state of the carbon chain polymers reduces the charge buildup along sidewalls to prevent twisting of the contact holes by bleeding off the charge and ensuring proper alignment with active area landing regions. The etching stops at the underlying substrate.
    Type: Application
    Filed: January 23, 2008
    Publication date: June 5, 2008
    Inventors: Gurtej S. Sandhu, Max F. Hineman, Daniel A. Steckert, Jingyi Bai, Shane J. Trapp, Tony Schrock
  • Patent number: 7344975
    Abstract: A method of high aspect ratio contact etching a substantially vertical contact hole in an oxide layer using a hard photoresist mask is described. The oxide layer is deposited on an underlying substrate. A plasma etching gas is formed from a carbon source gas. Dopants are mixed into the gas. The doped plasma etching gas etches a substantially vertical contact hole through the oxide layer by doping carbon chain polymers formed along the sidewalls of the contact holes during the etching process into a conductive state. The conductive state of the carbon chain polymers reduces the charge buildup along sidewalls to prevent twisting of the contact holes by bleeding off the charge and ensuring proper alignment with active area landing regions. The etching stops at the underlying substrate.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: March 18, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Max F. Hineman, Daniel A. Steckert, Jingyi Bai, Shane J. Trapp, Tony Schrock
  • Publication number: 20070049018
    Abstract: A method of high aspect ratio contact etching a substantially vertical contact hole in an oxide layer using a hard photoresist mask is described. The oxide layer is deposited on an underlying substrate. A plasma etching gas is formed from a carbon source gas. Dopants are mixed into the gas. The doped plasma etching gas etches a substantially vertical contact hole through the oxide layer by doping carbon chain polymers formed along the sidewalls of the contact holes during the etching process into a conductive state. The conductive state of the carbon chain polymers reduces the charge buildup along sidewalls to prevent twisting of the contact holes by bleeding off the charge and ensuring proper alignment with active area landing regions. The etching stops at the underlying substrate.
    Type: Application
    Filed: August 26, 2005
    Publication date: March 1, 2007
    Inventors: Gurtej Sandhu, Max Hineman, Daniel Steckert, Jingyi Bai, Shane Trapp, Tony Schrock
  • Publication number: 20060043536
    Abstract: A method for forming a semiconductor device comprises forming a layer to be etched, and forming a patterned photoresist layer over the layer to be etched. The patterned photoresist layer is treated prior to etching, for example by implantation with argon or nitrogen. This treatment reduces the volume of the photoresist, possibly by densifying the layer, which results in the photoresist layer being more resistant to an etch and decreasing the size of the feature to be formed. After treating the photoresist layer, the layer to be etched is exposed to an etchant.
    Type: Application
    Filed: August 31, 2004
    Publication date: March 2, 2006
    Inventors: Chih-Chen Co, Daniel Steckert
  • Patent number: 6107172
    Abstract: A gate is formed by creating a wafer stack, that includes a gate conductive layer over a substrate layer, depositing a SiO.sub.x N.sub.y layer over the conductive layer to act as a bottom anti-reflective coating (BARC), and forming a resist mask on the SiO.sub.x N.sub.y layer. Next, the resist mask is isotropically etched to further reduce the critical dimensions of the gate pattern formed therein, and then the underlying BARC and wafer stack are etched to form a gate out of the conductive layer.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: August 22, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Chih-Yuh Yang, Scott A. Bell, Daniel Steckert
  • Patent number: 5965461
    Abstract: A gate is formed by depositing a gate conductive layer over a substrate layer, depositing an organic spin-on bottom anti-reflective coating (BARC) over the gate conductive layer, and forming a resist mask on the BARC. Next, the resist mask is controllably etched to further reduce the critical dimensions of gate pattern formed therein, and then the gate is formed by etching the gate conductive layer using the reduced size resist mask.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: October 12, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Chih-Yuh Yang, Scott A. Bell, Daniel Steckert
  • Patent number: 5879975
    Abstract: The etch profile of side surfaces of a gate electrode is improved by heat treating the gate electrode layer after nitrogen implantation and before etching to form the gate electrode. Nitrogen implantation at high dosages to prevent subsequent impurity penetration through the gate dielectric layer, e.g., B penetration, amorphizes the upper portion of the gate electrode layer resulting in concave side surfaces upon etching to form the gate electrode. Heat treatment performed after nitrogen implantation can restore sufficient crystallinity so that, after etching the gate electrode layer, the side surfaces of the resulting gate electrode are substantially parallel.
    Type: Grant
    Filed: September 5, 1997
    Date of Patent: March 9, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Olov Karlsson, Effiong Ibok, Dong-Hyuk Ju, Scott A. Bell, Daniel A. Steckert, Robert Ogle