Abstract: The invention concerns methods and means for preventing the reduction of disulfide bonds during the recombinant production of disulfide-containing polypeptides. In particular, the invention concerns the prevention of disulfide bond reduction during harvesting of disulfide-containing polypeptides, including antibodies, from recombinant host cell cultures.

Abstract: Methods, systems, and computer program products are provided for minimizing latency in a implementation where a peripheral device is used as a capture device and a compute device such as a GPU processes the captured data in a computing environment. In embodiments, a peripheral device and GPU are tightly integrated and communicate at a hardware/firmware level. Peripheral device firmware can determine and store compute instructions specifically for the GPU, in a command queue. The compute instructions in the command queue are understood and consumed by firmware of the GPU. The compute instructions include but are not limited to generating low latency visual feedback for presentation to a display screen, and detecting the presence of gestures to be converted to OS messages that can be utilized by any application.

Abstract: Methods, systems, and computer program products are provided for minimizing latency in a implementation where a peripheral device is used as a capture device and a compute device such as a GPU processes the captured data in a computing environment. In embodiments, a peripheral device and GPU are tightly integrated and communicate at a hardware/firmware level. Peripheral device firmware can determine and store compute instructions specifically for the GPU, in a command queue. The compute instructions in the command queue are understood and consumed by firmware of the GPU. The compute instructions include but are not limited to generating low latency visual feedback for presentation to a display screen, and detecting the presence of gestures to be converted to OS messages that can be utilized by any application.

Abstract: Methods, systems, and computer program products are provided for minimizing latency in a implementation where a peripheral device is used as a capture device and a compute device such as a GPU processes the captured data in a computing environment. In embodiments, a peripheral device and GPU are tightly integrated and communicate at a hardware/firmware level. Peripheral device firmware can determine and store compute instructions specifically for the GPU, in a command queue. The compute instructions in the command queue are understood and consumed by firmware of the GPU. The compute instructions include but are not limited to generating low latency visual feedback for presentation to a display screen, and detecting the presence of gestures to be converted to OS messages that can be utilized by any application.

Abstract: A secure execution environment for execution of sensitive code and data including a secure asset management unit (SAMU) is described. The SAMU provides a secure execution environment to run sensitive code, for example, code associated with copy protection schemes established for content consumption. The SAMU architecture allows for hardware-based secure boot and memory protection and provides on-demand code execution for code provided by a host processor. The SAMU may boot from an encrypted and signed kernel code, and execute encrypted, signed code. The hardware-based security configuration facilitates preventing vertical or horizontal privilege violations.

Abstract: Methods, systems, and computer program products are provided for minimizing latency in a implementation where a peripheral device is used as a capture device and a compute device such as a GPU processes the captured data in a computing environment. In embodiments, a peripheral device and GPU are tightly integrated and communicate at a hardware/firmware level. Peripheral device firmware can determine and store compute instructions specifically for the GPU, in a command queue. The compute instructions in the command queue are understood and consumed by firmware of the GPU. The compute instructions include but are not limited to generating low latency visual feedback for presentation to a display screen, and detecting the presence of gestures to be converted to OS messages that can be utilized by any application.

Abstract: A secure execution environment for execution of sensitive code and data including a secure asset management unit (SAMU) is described. The SAMU provides a secure execution environment to run multiple instances of separate program code or data code associated with copy protection schemes established for content consumption. The SAMU architecture allows for hardware-based secure boot and memory protection and provides on-demand code execution for multiple instances of separate program code or data provided by a host processor. The SAMU may boot from an encrypted and signed kernel code, and execute encrypted, signed code. The hardware-based security configuration facilitates the prevention of vertical or horizontal privilege violations.

Abstract: When content, such as premium video or audio, is decoded, the content is stored in protected memory segments. Read access to the protected memory segments from a component not in a frame buffer protected (FBP) mode is blocked by a memory controller. The memory controller also blocks components in the FBP mode from writing to unprotected memory segments. The content may be processed by a processing engine operating in the FBP mode and may only be written back to protected memory segments. The memory segment may later be marked as unprotected if the memory segment is no longer needed. If the content is encrypted in protected memory, the encrypting key associated with the memory segment may be removed. If the content is stored in the clear, the protected memory segments are scrubbed before releasing the segments for use as unprotected memory segments.

Abstract: Disclosed herein is a processing unit configured to process video data, and applications thereof. In an embodiment, the processing unit includes a buffer and an execution unit. The buffer is configured to store a data word, wherein the data word comprises a plurality of bytes of video data. The execution unit is configured to execute a single instruction to (i) shift bytes of video data contained in the data word to align a desired byte of video data and (ii) process the desired byte of the video data to provide processed video data.

Abstract: A secure execution environment for execution of sensitive code and data including a secure asset management unit (SAMU) is described. The SAMU provides a secure execution environment to run sensitive code, for example, code associated with copy protection schemes established for content consumption. The SAMU architecture allows for hardware-based secure boot and memory protection and provides on-demand code execution for code provided by a host processor. The SAMU may boot from an encrypted and signed kernel code, and execute encrypted, signed code. The hardware-based security configuration facilitates preventing vertical or horizontal privilege violations.

Abstract: A secure execution environment for execution of sensitive code and data including a secure asset management unit (SAMU) is described. The SAMU provides a secure execution environment to run multiple instances of separate program code or data code associated with copy protection schemes established for content consumption. The SAMU architecture allows for hardware-based secure boot and memory protection and provides on-demand code execution for multiple instances of separate program code or data provided by a host processor. The SAMU may boot from an encrypted and signed kernel code, and execute encrypted, signed code. The hardware-based security configuration facilitates the prevention of vertical or horizontal privilege violations.

Abstract: Disclosed herein is a processing unit configured to process video data, and applications thereof. In an embodiment, the processing unit includes a buffer and an execution unit. The buffer is configured to store a data word, wherein the data word comprises a plurality of bytes of video data. The execution unit is configured to execute a single instruction to (i) shift bytes of video data contained in the data word to align a desired byte of video data and (ii) process the desired byte of the video data to provide processed video data.

Abstract: A video decoding method and apparatus receives a motion compensation shader command, such as a packet, for a programmable shader of a 3D pipeline, such as programmable vertex shaders and pixel shaders, to provide motion compensation for encoded video, and decode the encoded video using the programmable shader of the 3D pipeline. As such, the programmable shader of a 3D pipeline is used to provide motion compensated video decoding as opposed to, for example, dedicated hardware, thereby, among other advantages, eliminating the need for the dedicated hardware.

Abstract: A de-interlacer includes recursive motion history map generating circuitry operative to determine a motion value associated with one or more pixels in interlaced fields based on pixel intensity information from at least two neighboring same polarity fields. The recursive motion history map generating circuitry generates a motion history map containing recursively generated motion history values for use in de-interlacing interlaced fields wherein the recursively generated motion history values are based, at least in part, on a decay function.

Abstract: A method and system for prevention of unauthorized access to multimedia data are disclosed herein. A tamper-resistant system having a software driver, a peripheral device, and a system memory is used to encrypt sensitive routines used by the software driver. The software driver is used to interface between one component of the system, such as a processor, and a peripheral device, such as a graphics chip. The driver incorporates one or more sensitive routines, that if divulged, could possibly allow an unauthorized party access to data processed by the software driver. Accordingly, in one embodiment, the sensitive routines are stored in an encrypted format with the driver. To access a sensitive routine, the driver submits the associated encrypted routine to the peripheral device, as well as a decryption method, if desired, where it is decrypted and stored in a plaintext format in a location, such as system memory, accessible to both the driver and the peripheral device.

Abstract: Most often a pleasing video scene includes a few objects of great interest shown in front of a relatively uninteresting background. These pleasing scenes can be displayed with greater clarity and realism when the most computing intensive filter algorithms are used for images or parts of images of greatest interest. Run-time selection of algorithms used in particular frames or regions of a frame optimizes the use of filter computation resources.

Abstract: A method of deinterlacing interlaced fields of video for display in a progressive display device includes providing at least one candidate motion vector per scan line and determining, at least one final motion vector per scan line of interlaced video, for use in deinterlacing the interlaced fields, by iteratively changing the at least one candidate motion vector per scan line based on pixel intensities from each of a plurality of same polarity fields at locations along a single dimension.

Abstract: A de-interlacer includes recursive motion history map generating circuitry operative to determine a motion value associated with one or more pixels in interlaced fields based on pixel intensity information from at least two neighboring same polarity fields. The recursive motion history map generating circuitry generates a motion history map containing recursively generated motion history values for use in de-interlacing interlaced fields wherein the recursively generated motion history values are based, at least in part, on a decay function.

Abstract: A system and method for handling errors is provided. Errors related to the processing and storage of inverse discrete cosine transform (IDCT) image data cause hardware to become stalled. Stalled hardware may result in multiple image frames being dropped or lost during video playback. To avoid the stalling of hardware, the hardware is used to analyze the data being processed. Data being stored may be analyzed to determine if any error-characteristics, such as overflow or underflow, are present in the storing of the data. The data is manipulated to avoid stalling due to the error-characteristics.

Abstract: A video decoding method and apparatus receives a motion compensation shader command, such as a packet, for a programmable shader of a 3D pipeline, such as programmable vertex shaders and pixel shaders, to provide motion compensation for encoded video, and decode the encoded video using the programmable shader of the 3D pipeline. As such, the programmable shader of a 3D pipeline is used to provide motion compensated video decoding as opposed to, for example, dedicated hardware, thereby, among other advantages, eliminating the need for the dedicated hardware.