Abstract: Apparatus and methods to unwarp at least portions of distorted, electronically-captured images are described. Keypoints, instead of an entire image, may be unwarped and used in various machine-vision algorithms, such as object recognition, image matching, and 3D reconstruction algorithms. When using unwarped keypoints, the machine-vision algorithms may perform reliably irrespective of distortions that may be introduced by one or more image capture systems.

Abstract: Image-processing apparatus and methods to adaptively vary an interest point threshold value and control a number of interest points identified in an image frame are described. Sub-regions of an image frame may be processed in a sequence, and an interest point threshold value calculated for each sub-region. The calculated value of the interest point threshold may depend upon pre-selected values and values determined from the processing of one or more prior sub-regions. By using adaptive thresholding, a number of interest points detected for each frame in a sequence of image frames may remain substantially constant, even though objects within the frames may vary appreciably.

Abstract: Programs having a given instruction-set architecture are executed on a multiprocessor system comprising a plurality of processors, for example of a VLIW type, each of said processors being able to execute, at each processing cycle, a respective maximum number of instructions. The instructions are compiled as instruction words of given length executable on a first processor. At least some of the instruction words of given length are converted into modified-instruction words executable on a second processor. The operation of modifying comprises in turn at least one operation chosen in the group consisting of: splitting the instruction words into modified-instruction words; and entering no-operation instructions in the modified-instruction words.

Abstract: A method detects border tiles or border pixels of a primitive corresponding to an object to be displayed on a display screen. The detecting includes: calculating the number of border tiles or pixels covered by an edge of the primitive; identifying a plurality of vertices that divide the edge in a plurality of segments of equal length; calculating coordinates of the vertices; and associating a tile or pixel with the coordinates of each vertex. The number of vertices for the edge is greater than or equal to the number of border tiles or pixels.

Abstract: The program to be executed is compiled by translating it into native instructions of the instruction-set architecture of the processor system, organizing the instructions deriving from the translation of the program into respective bundles in an order of successive bundles, each bundle grouping together instructions adapted to be executed in parallel by the processor system. The bundles of instructions are ordered into respective sub-bundles, said sub-bundles identifying a first set of instructions, which must be executed before the instructions belonging to the next bundle of said order, and a second set of instructions, which can be executed both before and in parallel with respect to the instructions belonging to said subsequent bundle of said order.

Abstract: A method detects border tiles or border pixels of a primitive corresponding to an object to be displayed on a display screen. The detecting includes: calculating the number of border tiles or pixels covered by an edge of the primitive; identifying a plurality of vertices that divide the edge in a plurality of segments of equal length; calculating coordinates of the vertices; and associating a tile or pixel with the coordinates of each vertex. The number of vertices for the edge is greater than or equal to the number of border tiles or pixels.

Abstract: Programs having a given instruction-set architecture are executed on a multiprocessor system comprising a plurality of processors, for example of a VLIW type, each of said processors being able to execute, at each processing cycle, a respective maximum number of instructions. The instructions are compiled as instruction words of given length executable on a first processor. At least some of the instruction words of given length are converted into modified-instruction words executable on a second processor. The operation of modifying comprises in turn at least one operation chosen in the group consisting of: splitting the instruction words into modified-instruction words; and entering no-operation instructions in the modified-instruction words.

Abstract: Programs having a given instruction-set architecture are executed on a multiprocessor system comprising a plurality of processors, for example of a VLIW type, each of said processors being able to execute, at each processing cycle, a respective maximum number of instructions. The instructions are compiled as instruction words of given length executable on a first processor. At least some of the instruction words of given length are converted into modified-instruction words executable on a second processor. The operation of modifying comprises in turn at least one operation chosen in the group consisting of: splitting the instruction words into modified-instruction words; and entering no-operation instructions in the modified-instruction words.

Abstract: A method for texture compressing images having a plurality of color components (R, G, B) includes defining color representatives for use in encoding by defining groups of colors for each color component (R,G,B), and selecting a representative median color for the group. Each group ideally includes 3 to 15 increasing colors. The method includes computing, for each group, an error between each member of the group and the representative median color of the group. Typically, the error is computed as the sum of the absolute differences (SAD) between each member of the group and the representative median color of the group.

Abstract: Digital signals are converted between a first and second format by a conversion process including generating coefficients representing the digital signals. The coefficients may be discrete cosine transform coefficient generated during encoding/transcoding of MPEG signals. The coefficients are subject to quantization by generating a dither signal that is added to the coefficients before quantization to generate a quantized signal. Preferably, each coefficient is first subject to a first quantization in the absence of any dither signal added to generate an undithered quantized coefficient. If the undithered quantized signal is equal to zero the undithered quantized coefficient is taken as the output quantized signal. If the undithered quantized coefficient is different from zero, the dither signal is added and the dithered coefficient thus obtained is subject to quantization to generate the output quantized signal.

Abstract: A procedure for translating ARM instructions of a first set into instructions of a second set for execution on an LX processor comprising a core provides a first set of registers corresponding to the ARM instructions and a second set of registers corresponding to the instructions that can be executed on the LX processor. Each register of the first set is mapped in a corresponding register of the second set designed to emulate the behavior of the first register, obtaining a unique independent translation of the first set into the second set. The translation is performed by a translation device external to the LX core without altering the core, and the translation operating without accessing resources of the core, by the translating device intercepting accesses of the core to the storage area reserved to the ARM instructions.

Abstract: A method for texture compressing images having a plurality of color components (R, G, B), includes decomposing the images in sub-blocks each including only one color component. At least one first predictor is defined for each sub-block and a respective set of prediction differences is computed for each sub-block. Then the prediction differences for each sub-block are sorted, and a look-up prediction differences palette is set up by defining a look-up prediction error palette. A predetermined code is associated with each column of the error palette.

Abstract: A geometric processing stage for a pipelined engine for processing video signals and generating processed video signal in space coordinates (S) adapted for display on a screen. The geometric processing stage includes: a model view module for generating projection coordinates of primitives of the video signals in a view space, said primitives including visible and non-visible primitives, a back face culling module arranged downstream of the model view module for at least partially eliminating the non visible primitives, a projection transform module for transforming the coordinates of the video signals from view space coordinates into normalized projection coordinates (P), and a perspective divide module for transforming the coordinates of the video signals from normalized projection (P) coordinates into screen space coordinates (S). The back face culling module is arranged downstream the projection transform module and operates on normalized projection (P) coordinates of said primitives.

Abstract: A procedure for translating ARM instructions of a first set into instructions of a second set for execution on an LX processor comprising a core provides a first set of registers corresponding to the ARM instructions and a second set of registers corresponding to the instructions that can be executed on the LX processor. Each register of the first set is mapped in a corresponding register of the second set designed to emulate the behavior of the first register, obtaining a unique independent translation of the first set into the second set. The translation is performed by a translation device external to the LX core without altering the core, and the translation operating without accessing resources of the core, by the translating device intercepting accesses of the core to the storage area reserved to the ARM instructions.

Abstract: Digital signals are converted between a first and second format by a conversion process including generating coefficients representing the digital signals. The coefficients may be discrete cosine transform coefficient generated during encoding/transcoding of MPEG signals. The coefficients are subject to quantization by generating a dither signal that is added to the coefficients before quantization to generate a quantized signal. Preferably, each coefficient is first subject to a first quantization in the absence of any dither signal added to generate an undithered quantized coefficient. If the undithered quantized signal is equal to zero the undithered quantized coefficient is taken as the output quantized signal. If the undithered quantized coefficient is different from zero, the dither signal is added and the dithered coefficient thus obtained is subject to quantization to generate the output quantized signal.

Abstract: A method for texture compressing images having a plurality of color components (R, G, B), includes decomposing the images in sub-blocks each including only one color component. At least one first predictor is defined for each sub-block and a respective set of prediction differences is computed for each sub-block. Then the prediction differences for each sub-block are sorted, and a look-up prediction differences palette is set up by defining a look-up prediction error palette. A predetermined code is associated with each column of the error palette.

Abstract: A method for texture compressing images having a plurality of color components (R, G, B) includes defining color representatives for use in encoding by defining groups of colors for each color component (R,G,B), and selecting a representative median color for the group. Each group ideally includes 3 to 15 increasing colors. The method includes computing, for each group, an error between each member of the group and the representative median color of the group. Typically, the error is computed as the sum of the absolute differences (SAD) between each member of the group and the representative median color of the group.

Abstract: Binary words are converted between a non-encoded format and a compressed encoded format, in which the binary words are, at least in part, represented by encoded bit sequences that are shorter than the respective binary word in the non-encoded format. The shortest encoded bit sequences are selected according to the statistical recurrence of the respective words in the non-encoded format, and associated with the binary words with higher recurrence are encoded bit sequences comprising bit numbers that are accordingly smaller. The correspondence between binary words in non-encoded format and the encoded bit sequences associated to them is established by means of indices of an encoding vocabulary. The conversion process includes: arranging the indices in an ordered sequence; organizing the sequence into groups of vectors; splitting each group into a given number of vectors; and encoding the vectors independently from one another.

Abstract: Binary words are converted between a non-encoded format and a compressed encoded format, in which the binary words are, at least in part, represented by encoded bit sequences that are shorter than the respective binary word in the non-encoded format. The shortest encoded bit sequences are selected according to the statistical recurrence of the respective words in the non-encoded format, and associated with the binary words with higher recurrence are encoded bit sequences comprising bit numbers that are accordingly smaller. The correspondence between binary words in non-encoded format and the encoded bit sequences associated to them is established by means of indices of an encoding vocabulary. The conversion process includes: arranging the indices in an ordered sequence; organizing the sequence into groups of vectors; splitting each group into a given number of vectors; and encoding the vectors independently from one another.

Abstract: The program to be executed is compiled by translating it into native instructions of the instruction-set architecture of the processor system, organizing the instructions deriving from the translation of the program into respective bundles in an order of successive bundles, each bundle grouping together instructions adapted to be executed in parallel by the processor system. The bundles of instructions are ordered into respective sub-bundles, said sub-bundles identifying a first set of instructions, which must be executed before the instructions belonging to the next bundle of said order, and a second set of instructions, which can be executed both before and in parallel with respect to the instructions belonging to said subsequent bundle of said order.