Patents by Inventor Danniel Nahmanny

Danniel Nahmanny has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210364619
    Abstract: Some demonstrative aspects include radar apparatuses, devices, systems and methods. In one example, an apparatus may include a plurality of Transmit (Tx) chains to transmit radar Tx signals, and a plurality of Receive (Rx) chains to process radar Rx signals. For example, the radar Rx signals may be based on the radar Tx signals. The apparatus may be implemented, for example, as part of a radar device, for example, as part of a vehicle including the radar device. In other aspects, the apparatus may include any other additional or alternative elements and/or may be implemented as part of any other device.
    Type: Application
    Filed: May 20, 2021
    Publication date: November 25, 2021
    Applicant: Intel Corporation
    Inventors: Naftali Landsberg, Woorim Shin, Dan Ohev Zion, Meir Gordon, Omer Asaf, Danniel Nahmanny, Mustafijur Rahman, Stefano Pellerano
  • Patent number: 10263624
    Abstract: Systems, methods, and circuitries for synchronizing a first phase locked loop (PLL) with a second PLL are provided. In one example a PLL system includes a first PLL configured to generate a first signal; a second PLL configured to generate a second signal; and phase calculation circuitry. The phase calculation circuitry is configured to calculate a phase of the first signal at a given time; and provide the calculated phase to the second PLL for use by the second PLL in synchronizing a phase of the second with the phase of the first signal.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: April 16, 2019
    Assignee: Intel IP Corporation
    Inventors: Michael Kerner, Elan Banin, Yair Dgani, Evgeny Shumaker, Danniel Nahmanny, Gil Horovitz
  • Publication number: 20180375519
    Abstract: Systems, methods, and circuitries for synchronizing a first phase locked loop (PLL) with a second PLL are provided. In one example a PLL system includes a first PLL configured to generate a first signal; a second PLL configured to generate a second signal; and phase calculation circuitry. The phase calculation circuitry is configured to calculate a phase of the first signal at a given time; and provide the calculated phase to the second PLL for use by the second PLL in synchronizing a phase of the second with the phase of the first signal.
    Type: Application
    Filed: June 27, 2017
    Publication date: December 27, 2018
    Inventors: Michael Kerner, Elan Banin, Yair Dgani, Evgeny Shumaker, Danniel Nahmanny, Gil Horovitz
  • Patent number: 10088511
    Abstract: Described herein are architectures, platforms and methods for deriving a complex antenna impedance based on scalar measurements. Three significantly different electrical characterizations such as scattering parameter (S-parameter) settings that correspond to at least three perturbation applications may facilitate the derivation of the complex antenna impedance at an output port antenna load plane (L plane).
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: October 2, 2018
    Assignee: Intel IP Corporation
    Inventors: Danniel Nahmanny, Fabian Cossoy
  • Publication number: 20170089967
    Abstract: Described herein are architectures, platforms and methods for deriving a complex antenna impedance based on scalar measurements. Three significantly different electrical characterizations such as scattering parameter (S-parameter) settings that correspond to at least three perturbation applications may facilitate the derivation of the complex antenna impedance at an output port antenna load plane (L plane).
    Type: Application
    Filed: September 30, 2015
    Publication date: March 30, 2017
    Inventors: Danniel Nahmanny, Fabian Cossoy
  • Publication number: 20100169848
    Abstract: A novel and useful method of migrating an analog or mixed signal electronic circuit from a source technology to a target technology. Devices operating in current mode and their respective voltage tuning nodes are first identified in the source technology electronic circuit. Since a device operating in current mode is less sensitive to the voltage applied to its voltage tuning node, the voltage at the voltage tuning node can be changed to achieve better current mode device performance without interfering with the biasing conditions of other devices in the circuit. This enables a circuit designer to fully exploit the two available degrees of freedom (typically width and length) when migrating the electronic device operating in current mode from a source technology to a target technology.
    Type: Application
    Filed: December 30, 2008
    Publication date: July 1, 2010
    Inventors: Danniel Nahmanny, Dov Ramm, Benny Sheinman