Abstract: An example apparatus includes a first transistor coupled between a supply node and a first node, a current mirror having a first side and a second side, and a second transistor coupled between the first node and the first side of the current mirror. The input buffer further includes a third transistor coupled between the first node and the second side of the current mirror, and a first capacitor coupled between a source and a drain of the second transistor.

Abstract: An example voltage reference circuit includes: a reference circuit comprising a first circuit configured to generate a proportional-to-temperature current and corresponding first control voltage and a second circuit configured to generate a complementary-to-temperature current and corresponding second control voltage; a first current source coupled to a first load circuit, the first current source generating a sum current of the proportional-to-temperature current and the complementary-to-temperature current in response to the first and second control voltages, the first load circuit generating a zero temperature coefficient (Tempco) voltage from the sum current; and a second current source coupled to a second load circuit, the second current source generating the sum current of the proportional-to-temperature current and the complementary-to-temperature current in response to the first and second control voltages, the second load circuit generating a negative Tempco voltage from the sum current and the compl

Abstract: An example voltage reference circuit includes: a reference circuit comprising a first circuit configured to generate a proportional-to-temperature current and corresponding first control voltage and a second circuit configured to generate a complementary-to-temperature current and corresponding second control voltage; a first current source coupled to a first load circuit, the first current source generating a sum current of the proportional-to-temperature current and the complementary-to-temperature current in response to the first and second control voltages, the first load circuit generating a zero temperature coefficient (Tempco) voltage from the sum current; and a second current source coupled to a second load circuit, the second current source generating the sum current of the proportional-to-temperature current and the complementary-to-temperature current in response to the first and second control voltages, the second load circuit generating a negative Tempco voltage from the sum current and the compl

Abstract: An analog-to-digital converter (“ADC”). The ADC includes a bank of comparators and a window controller. The window controller is coupled to the bank of comparators to selectively activate first comparators of the bank of comparators associated with a window size and to selectively inactivate second comparators of the bank of comparators.

Abstract: An analog-to-digital converter (“ADC”) is disclosed. The ADC includes a bank of comparators and a window controller. The window controller is coupled to the bank of comparators to selectively activate first comparators of the bank of comparators associated with a window size and to selectively inactivate second comparators of the bank of comparators.

Abstract: A circuit includes an amplifier including a differential input stage including a first input terminal and a second input terminal. The circuit further includes a differential input line coupled to the first input terminal and the second input terminal, and shielding at least partially encompassing the differential input line. The shielding is connected to a node of the differential input stage of the amplifier.