Abstract: A video processing system may implement a video scaling algorithm using interpolation based on polyphase filtering. A video or graphics scaler may be utilized to scale luma, chroma, and/or alpha information in a video image. The scaler may comprise a first polyphase sub-filtering with zero phase shift that generates an in-phase filtered output from an input video image and a second polyphase sub-filtering that generates an out-of-phase filtered output from the input video image. The video scaler may also comprise an interpolator that may generate a scaled video image based on the generated in-phase and out-of-phase filtered outputs and a scaling factor. The scaling factor may be determined based on an input video size (M) and a desired output video size (N). The interpolation of the generated in-phase and out-of-phase filtered outputs in the video scaler may be implemented by utilizing a Farrow structure.

Abstract: Systems and methods are disclosed for performing multiple processing of data in a network. In one embodiment, the network comprises a first display pipeline that is formed in real time from a plurality of possible display pipelines and that performs at least a first processing step on received data. A buffer stores the processed data and a second display pipeline that is formed in real time from a plurality of possible display pipelines performs at least a second processing step on stored data.

Abstract: A system comprising a plurality of execution units configured to execute, at least in part, a plurality of instruction threads; a plurality of performance monitors, each performance monitor being configured to collect performance information related to the execution of at least one instruction thread; a selected thread identifier configured to provide, during operation, the selection of at least one instruction thread; and a performance manager configured to filter, utilizing the selected thread, the information collected by the plurality of performance monitors.

Abstract: A method and system are provided in which a video processor may select a 2D video output format or a 3D video output format. The video processor may generate composited video data by combining video data from a video source, and one or both of video data from additional video sources and graphics data from graphics source(s). The video processor may select the order in which such combination is to occur. The video data from the various video sources may comprise one or both of 2D video data and 3D video data. The graphics data from the graphics sources may comprise one or both of 2D graphics data and 3D graphics data. The video processor may perform 2D-to-3D and/or 3D-to-2D format conversion when appropriate to generate the composited video data in accordance with the selected output video format.

Abstract: A video processing system may receive a first frame comprising pixel data for a first 3-D view of an image, which may be referred to as first 3-D view pixel data, and receive a second frame comprising pixel data for a second 3-D view of the image, which may be referred to as second 3-D view pixel data. The system may generate a multi-view frame comprising the first 3-D view pixel data and the second 3-D view pixel data. The system may make a decision for performing processing of the image, wherein the decision is generated based on one or both of the first 3-D view pixel data and/or the second 3-D view pixel data. The system may process the 3-D multi-view frame based on the decision. The image processing operation may comprise, for example, deinterlacing, filtering, and cadence processing such as 3:2 pulldown.

Abstract: Aspects of a method and system for handling multiple 3-D video formats are provided. A video processing system may receive one or more video frames comprising first 3-D view pixel data and second 3-D view pixel data suitable for generating a three-dimensional (3-D) video frame. The video system may be operable to determine an arrangement of the first 3-D view pixel data and the second view pixel data in the one or more video frames. In instances that the determined arrangement is not a desired arrangement, the video processing system may be operable to convert the one or more video frames to the desired arrangement. Either or both of the determined arrangement and the desired arrangement may comprise a series of two single-view frames. Either or both of the determined arrangement and the desired arrangement may comprise a single frame comprising the first 3-D view pixel data and the second 3-D view pixel data.

Abstract: A method and system are provided in which an integrated circuit (IC) comprises multiple devices that may be selectively interconnected to route and process 3D video data. The IC may be operable to determine whether to scale the 3D video data before the 3D video data is captured to memory or after the captured 3D video data is retrieved from memory, and selectively interconnect one or more of the devices based on the determination. The selective interconnection may be based on input and output formats of the 3D video data, and on a scaling factor. The input format may be a left-and-right (L/R) format or an over-and-under (O/U) format. Similarly, the output format may be a L/R format or an O/U format. The selective interconnection may be based on input and output pixel rates of the 3D video data. Moreover, the selective interconnection may be determined on a picture-by-picture basis.

Abstract: A method and system are provided in which a video feeder may receive video data from multiple sources. The video data from one or more of those sources may comprise three-dimensional (3D) video data. The video data from each source may be stored in corresponding different areas in memory during a capture time for a single picture. Each of the different areas in memory may correspond to a different window of multiple windows in an output video picture. The video data from each source may be stored in memory in a 2D format or in a 3D format, based on a format of the output video picture. When a 3D format is to be used, left-eye and right-eye information may be stored in different portions of memory. The video data may be read from memory to a single buffer during a feed time for a single picture.

Abstract: A method and system for content adaptive analog video noise detection are provided. A motion metric (MM) value, an edge detection value, and a content detection value may be determined for pixels in a video image. The MM values of pixels with edge detection values smaller than an edge threshold value and with content detection values smaller than a content threshold value may be collected and accumulated for a portion of the noise level intervals when the MM values fall in this interval. The MM values collected and accumulated may be utilized to determine an average noise level for each of the intervals. A noise level indicator (NLI) for the current video image may be determined based on the noise level of the current image or on the noise levels of the current and at least one previous video images.

Abstract: System and method for encoding, transmitting and decoding audio data. Audio bit steam syntax is re-organized to allow system optimizations that work well with memory latency and memory burst operations. Multiple small entropy coding tables are stored in RAM and loaded to on-chip memory as needed. Audio prediction is pipelined in the bitstream syntax. Intra frames, independent of other frames in the bitstream, are included in the bitstream for error recovery and channel change. New algorithms are implemented in legacy syntax by including the new information in the user data space of the audio frame. The new decoder can use projection to determine where the new information is and read ahead in the stream. Audio prediction from the immediately previous frame is restricted. Audio prediction is performed across channels within a single audio frame. A variable re-order function comprises storing channels of data to DRAM in the order they are decoded and reading them out in presentation order.

Abstract: A 3-dimensional (3D) video receiver may be operable to deinterlace a decompressed 3D video frame having a 3D video interlaced format to generate a first 3D video frame having a first 3D video progressive format. The generated first 3D video frame having the first 3D video progressive format may be converted to generate a second 3D video frame having a second 3D video progressive format. The generated first 3D video frame having the first 3D video progressive format may be scaled to generate the second 3D video frame having the second 3D video progressive format. When the 3D video receiver operates in an electronic program guide mode or a graphics over video mode, the generated second 3D video frame may be blended with graphics. The second 3D video frame comprising a 50Hz frame rate may be frame-rate upconverted to a third 3D video frame comprising a 60Hz frame rate.

Abstract: A 3-dimensional (3D) video receiver may be operable to scale a decompressed 3D video frame having a first 3D video progressive format to generate a 3D video frame having a second 3D video progressive format, where the second 3D video progressive format comprises a high-definition multimedia interface (HDMI) format. When operating in an electronic program guide mode or a graphics over video mode, the 3D video frame having the second 3D video progressive format may be blended with graphics. The 3D video frame having the second 3D video progressive format may be converted to generate a 3D video frame having a 3D video interlaced format by performing a pulldown. The 3D video frame having the second 3D video progressive format at a 50 Hz frame rate may be frame-rate upconverted to generate a 3D video frame having a third 3D video progressive format at a 60 Hz frame rate.

Abstract: A 3-dimensional (3D) video receiver may be operable to convert a decompressed 3D video frame having a 3D video interlaced format to generate a first 3D video frame having a first 3D video progressive format by performing an inverse pulldown. The generated first 3D video frame having the first 3D video progressive format may be converted to generate a second 3D video frame having a second 3D video progressive format. The generated first 3D video frame having the first 3D video progressive format may be scaled to generate the second 3D video frame having the second 3D video progressive format. When the 3D video receiver is operating in an electronic program guide (EPG) mode or in a graphics over video mode, the generated second 3D video frame having the second 3D video progressive format may be blended with graphics.

Abstract: A system and method that produces a spatial average for interlaced video in a deinterlacer. The system detects edges in the video images and determines the angle at which the edges are oriented based on the gradient in the x-direction and the gradient in the y-direction. The direction of the edge is determined using the angle information of the edge. The system may also determine the strength of the edge. Based on the determined characteristics of the edge a filter may be selected to produce a spatial average of the edge in the image.

Abstract: Methods and systems for coordinating the handling of information are disclosed herein and may include scheduling multiple processing tasks for processing multimedia data by a processor. A portion of the scheduled multiple processing tasks may be preprocessed and the preprocessed portion may be buffered within a modifiable buffer that handles overflow and underflow. A portion of the buffered preprocessed portion of the scheduled multiple processing tasks may be executed. The scheduling may utilize a non-preemptive scheduling algorithm, such as an earliest deadline first (EDF) scheduling algorithm and/or a rate monotonic (RM) scheduling algorithm. The scheduled multiple processing tasks may include at least one maximum real deadline. The preprocessed portion of the scheduled multiple processing tasks may be outputted during processing of the blocking task, if a current task of the scheduled multiple processing tasks comprises a blocking task.

Abstract: Systems and methods are disclosed for a bus, link or interface. More specifically, systems and methods are discloses for a bus, link or interface adapted to transmit data and control information to at least one processing module and provide synchronization between the data and the control information without requiring the transmission of blank pixels or timing information.

Abstract: A method and system for parameter generating for digital noise reduction based on bitstream properties is provided, which may comprise receiving at a host processor, a plurality of picture level parameters generated by a video decoder for a video stream. The host processor may control a digital noise reduction (DNR) module that processes input video from a video bus using the received plurality of picture level parameters.

Abstract: Presented herein are systems and methods for efficiently storing macroblocks in DRAM. The macroblocks are stored contiguously allowing each macroblock to be written and overwritten in a single write transaction. Additionally, in one embodiment, as many as five macroblocks can be written or overwritten in a single write transaction.

Abstract: Systems and methods are disclosed for non-preemptive DRAM transactions. More specifically, the present invention relates to improvements in non-preemptive DRAM transactions in real-time unified memory architectures. One embodiment of the present invention relates to a method for determining access to non-preemptive DRAM devices. This method comprises determining real time need for access to the device and prioritizing access using a rate monotonic scheduling.

Abstract: A video processing system may implement a video scaling algorithm using interpolation based on polyphase filtering. A video or graphics scaler may be utilized to scale luma, chroma, and/or alpha information in a video image. The scaler may comprise a first polyphase sub-filtering with zero phase shift that generates an in-phase filtered output from an input video image and a second polyphase sub-filtering that generates an out-of-phase filtered output from the input video image. The video scaler may also comprise an interpolator that may generate a scaled video image based on the generated in-phase and out-of-phase filtered outputs and a scaling factor. The scaling factor may be determined based on an input video size (M) and a desired output video size (N). The interpolation of the generated in-phase and out-of-phase filtered outputs in the video scaler may be implemented by utilizing a Farrow structure.