Patents by Inventor Darren S. Braun

Darren S. Braun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6449274
    Abstract: Methods and devices useful in high-speed scalable switching systems include a memoryless switch fabric, per virtual channel queuing, digital phase aligners, randomized and complement connection modes, a mid-point negative acknowledge and output negative acknowledge scheme among other elements. A particular implementation of a routing table and switch element is described in part to illustrate the various techniques and devices of the invention.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: September 10, 2002
    Assignee: PMC-Sierra, Inc.
    Inventors: Brian D. Holden, Brian D. Alleyne, Darren S. Braun, Imran Chaudhri, Kevin Reno, Nadeem Haq, Chee Hu, Raghavan P Menon, Steve T Sprouse, Dinesh Venkatachalam
  • Patent number: 6445705
    Abstract: Methods and devices useful in high-speed scalable switching systems include a memoryless switch fabric, per virtual channel queuing, digital phase aligners, randomized and complement connection modes, a mid-point negative acknowledge and output negative acknowledge scheme among other elements. A particular implementation of a routing table and switch element is described in part to illustrate the various techniques and devices of the invention.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: September 3, 2002
    Assignee: PMC-Sierra, Inc.
    Inventors: Brian D. Holden, Brian D. Alleyne, Darren S. Braun, Nadeem Haq, Chee Hu
  • Patent number: 6396809
    Abstract: Methods and devices useful in high-speed scalable switching systems include a memoryless switch fabric, per virtual channel queuing, digital phase aligners, randomized and complement connection modes, a mid-point negative acknowledge and output negative acknowledge scheme among other elements. A particular implementation of a routing table and switch element is described in part to illustrate the various techniques and devices of the invention.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: May 28, 2002
    Assignee: PMC-Sierra, Inc.
    Inventors: Brian D. Holden, Brian D. Alleyne, Darren S. Braun, Nadeem Haq
  • Patent number: 6226298
    Abstract: A system and method for flushing cells in an ATM network sets an interval timer during which it would be expected that an active physical output would indicate it could accept a cell. When an interval elapses, a physical output that has not indicated it is ready to accept a cell is marked as disabled and may remain so until the output is reset. Cells in an output queue to a disabled cell are flushed during periods when no higher priority cells are available to be sent.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: May 1, 2001
    Assignee: PMC-Sierra (Maryland), Inc.
    Inventors: Brian D. Holden, Brian D. Alleyne, Darren S. Braun
  • Patent number: 6188690
    Abstract: Methods and devices useful in high-speed scalable switching systems include a memoryless switch fabric, per virtual channel queuing, digital phase aligners, randomized and complement connection modes, a mid-point negative acknowledge and output negative acknowledge scheme among other elements. A particular implementation of a routing table and switch element is described in part to illustrate the various techniques and devices of the invention.
    Type: Grant
    Filed: December 11, 1997
    Date of Patent: February 13, 2001
    Assignee: PMC-Sierra, Inc.
    Inventors: Brain D. Holden, Brian D. Alleyne, Darren S. Braun, Kevin Reno, Chee Hu, Raghavan Menon, Steve Sprouse