Patents by Inventor Darren V. Goedeke

Darren V. Goedeke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7736957
    Abstract: A method for forming a semiconductor device includes providing a semiconductor substrate; forming a gate dielectric over the semiconductor substrate; forming a gate electrode over the gate dielectric; forming an insulating layer over a sidewall of the gate electrode; defining source and drain regions in the semiconductor substrate adjacent to the insulating layer; implanting a dopant in the source and drain regions of the semiconductor substrate to form doped source and drain regions; forming a sidewall spacer adjacent to the insulating layer; forming a recess in the semiconductor substrate in the source and drain regions, wherein the recess extends directly underneath the spacer a predetermined distance from a channel regions; and forming a stressor material in the recess. The method allows the stressor material to be formed closer to a channel region, thus improving carrier mobility in the channel while not degrading short channel effects.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: June 15, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Paul A. Grudowski, Veeraraghavan Dhandapani, Darren V. Goedeke, Voon-Yew Thean, Stefan Zollner
  • Patent number: 7544997
    Abstract: A method for forming a semiconductor device includes forming a recess in a source region and a recess in a drain region of the semiconductor device. The method further includes forming a first semiconductor material layer in the recess in the source region and a second semiconductor material layer in the recess in the drain region, wherein each of the first semiconductor material layer and the second semiconductor material layer are formed using a stressor material having a first ratio of an atomic concentration of a first element and an atomic concentration of a second element, wherein the first element is silicon and a first level of concentration of a doping material. The method further includes forming additional semiconductor material layers overlying the first semiconductor material layer and the second semiconductor material layer that have a different ratio of the atomic concentration of the first element and the second element.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: June 9, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Da Zhang, Veeraraghavan Dhandapani, Darren V. Goedeke, Jill C. Hildreth
  • Publication number: 20080299724
    Abstract: A method for forming a semiconductor device includes providing a semiconductor substrate; forming a gate dielectric over the semiconductor substrate; forming a gate electrode over the gate dielectric; forming an insulating layer over a sidewall of the gate electrode; defining source and drain regions in the semiconductor substrate adjacent to the insulating layer; implanting a dopant in the source and drain regions of the semiconductor substrate to form doped source and drain regions; forming a sidewall spacer adjacent to the insulating layer; forming a recess in the semiconductor substrate in the source and drain regions, wherein the recess extends directly underneath the spacer a predetermined distance from a channel regions; and forming a stressor material in the recess. The method allows the stressor material to be formed closer to a channel region, thus improving carrier mobility in the channel while not degrading short channel effects.
    Type: Application
    Filed: May 31, 2007
    Publication date: December 4, 2008
    Inventors: Paul A. Grudowski, Veeraraghavan Dhandapani, Darren V. Goedeke, Voon-Yew Thean, Stefan Zollner
  • Publication number: 20080197412
    Abstract: A method for forming a semiconductor device includes forming a recess in a source region and a recess in a drain region of the semiconductor device. The method further includes forming a first semiconductor material layer in the recess in the source region and a second semiconductor material layer in the recess in the drain region, wherein each of the first semiconductor material layer and the second semiconductor material layer are formed using a stressor material having a first ratio of an atomic concentration of a first element and an atomic concentration of a second element, wherein the first element is silicon and a first level of concentration of a doping material. The method further includes forming additional semiconductor material layers overlying the first semiconductor material layer and the second semiconductor material layer that have a different ratio of the atomic concentration of the first element and the second element.
    Type: Application
    Filed: February 16, 2007
    Publication date: August 21, 2008
    Inventors: Da Zhang, Veeraraghavan Dhandapani, Darren V. Goedeke, Jill C. Hildreth