Patents by Inventor Darrin Leroy Gieger

Darrin Leroy Gieger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240106680
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for communication resilience in a Ring Network Topology. In some aspects, a top Ethernet node, implemented in a Ring Network Topology (“RNT”) that includes multiple additional Ethernet nodes, receives downstream traffic having a virtual local area network (“VLAN”) service address. The top Ethernet node can determine that the downstream traffic is destined for a given device serviced by a given Ethernet node, from among the multiple additional Ethernet nodes, that terminates a given Ethernet Ring Protection Switching (“ELPS”) group. The top Ethernet node can determine a given VLAN subnetwork that has been mapped to the given ELPS group, and transmit the downstream traffic through the RNT using the given VLAN subnetwork.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 28, 2024
    Inventors: Andrew T. Ruble, Douglas T. Albright, Darrin Leroy Gieger, Stefan Diener, Frank Below
  • Patent number: 7366179
    Abstract: A dual PHY-based integrated access device (IAD) platform employs a highly integrated time division multiplexed (TDM), a synchronous transfer mode (ATM) cell based architecture, to provide enhanced interfacing flexibility for multiple and diverse signaling protocols, effectively reducing the cost and constraints as to choice of host processor used in conventional digital signal processor (DSP)-based IADs. With the signaling transport speed of the dual PHY based path being an order of magnitude greater than that of any of the plurality of communication paths with which the IAD is interfaced, the IAD of the invention provides effectively real time support for different communication requirements, including TDM, ATM, HDLC, and the like.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: April 29, 2008
    Assignee: Adtran, Inc.
    Inventors: Paul Graves McElroy, Phillip Stone Herron, Bruce Edward Mitchell, Darrin Leroy Gieger
  • Publication number: 20030235198
    Abstract: A dual PHY-based integrated access device (IAD) platform employs a highly integrated time division multiplexed (TDM), a synchronous transfer mode (ATM) cell based architecture, to provide enhanced interfacing flexibility for multiple and diverse signaling protocols, effectively reducing the cost and constraints as to choice of host processor used in conventional digital signal processor (DSP)-based IADs. With the signaling transport speed of the dual PHY based path being an order of magnitude greater than that of any of the plurality of communication paths with which the IAD is interfaced, the IAD of the invention provides effectively real time support for different communication requirements, including TDM, ATM, HDLC, and the like.
    Type: Application
    Filed: October 1, 2002
    Publication date: December 25, 2003
    Applicant: ADTRAN, INC.
    Inventors: Paul Graves McElroy, Phillip Stone Herron, Bruce Edward Mitchell, Darrin Leroy Gieger