Abstract: Memory access bandwidth within a digital camera is allocated among several requestors by assigning each requester a “tokens per snapshot” (TPS) value. Each requestor has a DMA engine and a DMA entry queue. If the requester wishes to access the memory, then a DMA entry is pushed onto the DMA entry queue of the requester. An arbiter uses the TPS values to select DMA entries off the various queues for incorporation into a “snapshot”. The arbiter then selects DMA entries from the snapshot in an order for servicing such that memory access overhead in accessing the memory is reduced. Only after all DMA entries of the snapshot have been serviced is another snapshot of entries selected. Maximum latency in servicing a queue is controlled by assigning each queue a time out value (TOV). If a queue times out, then that queue is moved up in the order of servicing.