Patents by Inventor Darshan Kumar Nandanwar

Darshan Kumar Nandanwar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Performance aware partial cache collapse
    Patent number: 11940914
    Abstract: Aspects of the present disclosure relate to systems and methods for improving performance of a partial cache collapse by a processing device. Certain embodiments provide a method for performing a partial cache collapse procedure, the method including: counting a number of cache lines that satisfy an eviction criteria based on a deterministic cache eviction policy in each cache way of a group of cache ways; selecting at least one cache way from the group for collapse, based on its corresponding number of cache lines that satisfy the eviction criteria; and performing the partial cache collapse procedure based on the at least one cache way selected from the group for collapse.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: March 26, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Hithesh Hassan Lepaksha, Sharath Kumar Nagilla, Darshan Kumar Nandanwar, Nirav Narendra Desai, Venkata Biswanath Devarasetty
  • ACCESS OPTIMIZED PARTIAL CACHE COLLAPSE
    Publication number: 20230401156
    Abstract: Aspects of the present disclosure relate to systems and methods for improving performance of a partial cache collapse by a processing device. Certain embodiments provide a method for performing a partial cache collapse procedure, the method including: counting, in each cache way of a group of cache ways, a number of dirty cache lines having dirty bits indicating the cache line has been modified; selecting, from the group, at least one cache way for collapse, based on its corresponding number of dirty cache lines; and performing the partial cache collapse procedure based on the at least one cache way selected from the group for collapse.
    Type: Application
    Filed: June 10, 2022
    Publication date: December 14, 2023
    Inventors: Hithesh Hassan LEPAKSHA, Sharath Kumar NAGILLA, Darshan Kumar NANDANWAR, Nirav Narendra DESAI, Venkata Biswanath DEVARASETTY
  • PERFORMANCE AWARE PARTIAL CACHE COLLAPSE
    Publication number: 20230401152
    Abstract: Aspects of the present disclosure relate to systems and methods for improving performance of a partial cache collapse by a processing device. Certain embodiments provide a method for performing a partial cache collapse procedure, the method including: counting a number of cache lines that satisfy an eviction criteria based on a deterministic cache eviction policy in each cache way of a group of cache ways; selecting at least one cache way from the group for collapse, based on its corresponding number of cache lines that satisfy the eviction criteria; and performing the partial cache collapse procedure based on the at least one cache way selected from the group for collapse.
    Type: Application
    Filed: May 27, 2022
    Publication date: December 14, 2023
    Inventors: Hithesh Hassan LEPAKSHA, Sharath Kumar NAGILLA, Darshan Kumar NANDANWAR, Nirav Narendra DESAI, Venkata Biswanath DEVARASETTY
  • Access optimized partial cache collapse
    Patent number: 11836086
    Abstract: Aspects of the present disclosure relate to systems and methods for improving performance of a partial cache collapse by a processing device. Certain embodiments provide a method for performing a partial cache collapse procedure, the method including: counting, in each cache way of a group of cache ways, a number of dirty cache lines having dirty bits indicating the cache line has been modified; selecting, from the group, at least one cache way for collapse, based on its corresponding number of dirty cache lines; and performing the partial cache collapse procedure based on the at least one cache way selected from the group for collapse.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: December 5, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Hithesh Hassan Lepaksha, Sharath Kumar Nagilla, Darshan Kumar Nandanwar, Nirav Narendra Desai, Venkata Biswanath Devarasetty