Abstract: A method and system for generating electronic hardware simulation model segments is disclosed. The input to the method and system are abstraction models that define the mappings between the signals of electronic circuit models and the signals of specification models expressed at higher levels of temporal and/or data abstraction. Abstraction models are converted into simulation model segments using a two-step process where abstraction models are first converted into intermediate data structures. A second step converts the data structures into simulation model segments in any of the standard hardware description languages (HDLs). Useful applications of the method and system include automated simulation test bench generation and automated synthesis of hardware design models from behavioral specifications.