Abstract: A hardware and software controlled on/off circuit for computers is provided. The on/off circuit comprises a control circuit which produces first and second signals, wherein the first signal causes the computer to execute a software program which prepares the computer for power removal and which returns a third signal to the circuit when the software program has prepared the computer for power removal, and wherein the circuit produces the second signal to disconnect the power supply in response to the third signal. If for some reason the software program should “lock-up” the computer, the on/off circuit and provides the second signal to disconnect the power supply if the software program has not sent the third signal after a predetermined time from when the control circuit sent the first signal to the software program so that the computer may be shut down.

Abstract: An electronic business machine having a cash drawer therein, the electronic business machine including a circuit which operatively couples the microprocessor to a driver which energizes a device, such as a solenoid, for a predetermined period of time, which can be altered by programming, in order to open the cash drawer. An alternative embodiment discloses a multivibrator being used in place of the circuit for energizing the driver.

Abstract: An electronic keylock system comprises a key which includes a precision resistance, a receiver for receiving the key, an analog-to-digital converter coupled to the receiver for measuring the resistance of the precision resistance of the key, circuitry for controlling the analog-to-digital converter, decoding logic for receiving data from the analog-to-digital converter and decrypting the data to provide information with respect to the type of key applied to the receiver, and circuitry for controlling the decoding logic. Two system embodiments are disclosed, one of which employs separate components, and the other of which employs a microcontroller combining several functions.

Abstract: A semiconductor memory controller chip associated with a remote DMA device, a multispeed microprocessor and a DRAM memory requiring refreshing periodically includes refresh circuits for generating refresh signals for controlling refreshing of the memory during transparent and contention refresh operations. When a conflict occurs between the DMA device requesting access to the memory and the occurrence of a transparent refresh operation, control signals are generated to allow the memory to be refreshed prior to the time the DMA device is given access to the memory, thereby eliminating the need for a contention refresh operation. Control signals are also generated in accordance with the speed of the microprocessor for synchronizing the operation of the microprocessor with the operation of the DMA device.