Patents by Inventor David Alston
David Alston has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11966777Abstract: A hardware state machine connected to a processor, the hardware state machine configured to receive operational codes from the processor; a multiplexer connected to the processor, the hardware state machine and a checksum circuit, the multiplexer configured to receive data from the processor; and a transmit circuit connected to the multiplexer, the transmit circuit configured to receive data from the multiplexer for transmission to a far end device, wherein the hardware state machine is further configured to, responsive receiving one or more operational codes from the processor: cause the checksum circuit to alter a checksum value of a first data packet being transmitted by the transmit circuit; and cause the transmit circuit to preempt transmission of the first data packet and begin transmitting a second data packet once the checksum value so altered has been transmitted from the transmit circuit.Type: GrantFiled: February 7, 2022Date of Patent: April 23, 2024Assignee: Texas Instruments IncorporatedInventors: Thomas Anton Leyrer, William Cronin Wallace, David Alston Lide
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Patent number: 11704154Abstract: A real-time computational device includes a programmable real-time processor, a communications input port which is connected to the programmable real-time processor through a first broadside interface, and a communications output port which is connected to the programmable real-time processor through a second broadside interface. Both broadside interfaces enable 1024 bits of data to be transferred across each of the broadside interfaces in a single clock cycle of the programmable real-time processor.Type: GrantFiled: June 28, 2021Date of Patent: July 18, 2023Assignee: Texas Instruments IncorporatedInventors: Thomas Anton Leyrer, William Cronin Wallace, Pratheesh Gangadhar Thalakkal Kottilaveedu, David Alston Lide
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Patent number: 11579877Abstract: A computational system includes one or more processors. Each processor has multiple registers, as well attached memory to hold instructions. The processor is coupled to one or more broadside interfaces. A broadside interface allows the processor to load or store an entire widget state in a single clock cycle of the processor. The broadside interface also allows the processor to move and store 32 bytes of information into RAM in less than four to five clock cycles of the processor while the processor concurrently performs one or more mathematical operations on the information while the move and store operation is taking place.Type: GrantFiled: April 6, 2021Date of Patent: February 14, 2023Assignee: Texas Instruments IncorporatedInventors: Thomas Anton Leyrer, William Cronin Wallace, David Alston Lide, Pratheesh Gangadhar Thalakkal Kottilaveedu
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Publication number: 20220164226Abstract: A hardware state machine connected to a processor, the hardware state machine configured to receive operational codes from the processor; a multiplexer connected to the processor, the hardware state machine and a checksum circuit, the multiplexer configured to receive data from the processor; and a transmit circuit connected to the multiplexer, the transmit circuit configured to receive data from the multiplexer for transmission to a far end device, wherein the hardware state machine is further configured to, responsive receiving one or more operational codes from the processor: cause the checksum circuit to alter a checksum value of a first data packet being transmitted by the transmit circuit; and cause the transmit circuit to preempt transmission of the first data packet and begin transmitting a second data packet once the checksum value so altered has been transmitted from the transmit circuit.Type: ApplicationFiled: February 7, 2022Publication date: May 26, 2022Inventors: Thomas Anton LEYRER, William Cronin WALLACE, David Alston LIDE
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Patent number: 11243809Abstract: A hardware state machine connected to a processor, the hardware state machine configured to receive operational codes from the processor; a multiplexer connected to the processor, the hardware state machine and a checksum circuit, the multiplexer configured to receive data from the processor; and a transmit circuit connected to the multiplexer, the transmit circuit configured to receive data from the multiplexer for transmission to a far end device, wherein the hardware state machine is further configured to, responsive receiving one or more operational codes from the processor: cause the checksum circuit to alter a checksum value of a first data packet being transmitted by the transmit circuit; and cause the transmit circuit to preempt transmission of the first data packet and begin transmitting a second data packet once the checksum value so altered has been transmitted from the transmit circuit.Type: GrantFiled: December 18, 2020Date of Patent: February 8, 2022Assignee: Texas Instmments IncorporatedInventors: Thomas Anton Leyrer, William Cronin Wallace, David Alston Lide
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Publication number: 20210326178Abstract: A real-time computational device includes a programmable real-time processor, a communications input port which is connected to the programmable real-time processor through a first broadside interface, and a communications output port which is connected to the programmable real-time processor through a second broadside interface. Both broadside interfaces enable 1024 bits of data to be transferred across each of the broadside interfaces in a single clock cycle of the programmable real-time processor.Type: ApplicationFiled: June 28, 2021Publication date: October 21, 2021Inventors: Thomas Anton LEYRER, William Cronin WALLACE, Pratheesh Gangadhar THALAKKAL KOTTILAVEEDU, David Alston LIDE
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Publication number: 20210224070Abstract: A computational system includes one or more processors. Each processor has multiple registers, as well attached memory to hold instructions. The processor is coupled to one or more broadside interfaces. A broadside interface allows the processor to load or store an entire widget state in a single clock cycle of the processor. The broadside interface also allows the processor to move and store 32 bytes of information into RAM in less than four to five clock cycles of the processor while the processor concurrently performs one or more mathematical operations on the information while the move and store operation is taking place.Type: ApplicationFiled: April 6, 2021Publication date: July 22, 2021Inventors: Thomas Anton LEYRER, William Cronin WALLACE, David Alston LIDE, Pratheesh Gangadhar THALAKKAL KOTTILAVEEDU
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Patent number: 11048552Abstract: A real-time computational device includes a programmable real-time processor, a communications input port which is connected to the programmable real-time processor through a first broadside interface, and a communications output port which is connected to the programmable real-time processor through a second broadside interface. Both broadside interfaces enable 1024 bits of data to be transferred across each of the broadside interfaces in a single clock cycle of the programmable real-time processor.Type: GrantFiled: May 29, 2019Date of Patent: June 29, 2021Assignee: Texas Instruments IncorporatedInventors: Thomas Anton Leyrer, William Cronin Wallace, Pratheesh Gangadhar Thalakkal Kottilaveedu, David Alston Lide
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Publication number: 20210103469Abstract: A hardware state machine connected to a processor, the hardware state machine configured to receive operational codes from the processor; a multiplexer connected to the processor, the hardware state machine and a checksum circuit, the multiplexer configured to receive data from the processor; and a transmit circuit connected to the multiplexer, the transmit circuit configured to receive data from the multiplexer for transmission to a far end device, wherein the hardware state machine is further configured to, responsive receiving one or more operational codes from the processor: cause the checksum circuit to alter a checksum value of a first data packet being transmitted by the transmit circuit; and cause the transmit circuit to preempt transmission of the first data packet and begin transmitting a second data packet once the checksum value so altered has been transmitted from the transmit circuit.Type: ApplicationFiled: December 18, 2020Publication date: April 8, 2021Inventors: Thomas Anton LEYRER, William Cronin WALLACE, David Alston LIDE
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Patent number: 10970074Abstract: A computational system includes one or more processors. Each processor has multiple registers, as well attached memory to hold instructions. The processor is coupled to one or more broadside interfaces. A broadside interface allows the processor to load or store an entire widget state in a single clock cycle of the processor. The broadside interface also allows the processor to move and store 32 bytes of information into RAM in less than four to five clock cycles of the processor while the processor concurrently performs one or more mathematical operations on the information while the move and store operation is taking place.Type: GrantFiled: May 29, 2019Date of Patent: April 6, 2021Assignee: Texas Instruments IncorporatedInventors: Thomas Anton Leyrer, William Cronin Wallace, David Alston Lide, Pratheesh Gangadhar Thalakkal K{dot over (o)}ttilaveedu
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Patent number: 10871992Abstract: A hardware state machine connected to a processor, the hardware state machine configured to receive operational codes from the processor; a multiplexer connected to the processor, the hardware state machine and a checksum circuit, the multiplexer configured to receive data from the processor; and a transmit circuit connected to the multiplexer, the transmit circuit configured to receive data from the multiplexer for transmission to a far end device, wherein the hardware state machine is further configured to, responsive receiving one or more operational codes from the processor: cause the checksum circuit to alter a checksum value of a first data packet being transmitted by the transmit circuit; and cause the transmit circuit to preempt transmission of the first data packet and begin transmitting a second data packet once the checksum value so altered has been transmitted from the transmit circuit.Type: GrantFiled: May 29, 2019Date of Patent: December 22, 2020Assignee: Texas Instruments IncorporatedInventors: Thomas Anton Leyrer, William Cronin Wallace, David Alston Lide
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Publication number: 20190369996Abstract: A computational system includes one or more processors. Each processor has multiple registers, as well attached memory to hold instructions. The processor is coupled to one or more broadside interfaces. A broadside interface allows the processor to load or store an entire widget state in a single clock cycle of the processor. The broadside interface also allows the processor to move and store 32 bytes of information into RAM in less than four to five clock cycles of the processor while the processor concurrently performs one or more mathematical operations on the information while the move and store operation is taking place.Type: ApplicationFiled: May 29, 2019Publication date: December 5, 2019Inventors: Thomas Anton LEYRER, William Cronin WALLACE, David Alston LIDE, Pratheesh Gangadhar Thalakkal Kottilaveedu
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Publication number: 20190370207Abstract: A real-time computational device includes a programmable real-time processor, a communications input port which is connected to the programmable real-time processor through a first broadside interface, and a communications output port which is connected to the programmable real-time processor through a second broadside interface. Both broadside interfaces enable 1024 bits of data to be transferred across each of the broadside interfaces in a single clock cycle of the programmable real-time processor.Type: ApplicationFiled: May 29, 2019Publication date: December 5, 2019Inventors: Thomas Anton LEYRER, William Cronin WALLACE, Pratheesh Gangadhar THALAKKAL KOTTILAVEEDU, David Alston LIDE
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Publication number: 20190370110Abstract: A hardware state machine connected to a processor, the hardware state machine configured to receive operational codes from the processor; a multiplexer connected to the processor, the hardware state machine and a checksum circuit, the multiplexer configured to receive data from the processor; and a transmit circuit connected to the multiplexer, the transmit circuit configured to receive data from the multiplexer for transmission to a far end device, wherein the hardware state machine is further configured to, responsive receiving one or more operational codes from the processor: cause the checksum circuit to alter a checksum value of a first data packet being transmitted by the transmit circuit; and cause the transmit circuit to preempt transmission of the first data packet and begin transmitting a second data packet once the checksum value so altered has been transmitted from the transmit circuit.Type: ApplicationFiled: May 29, 2019Publication date: December 5, 2019Inventors: Thomas Anton LEYRER, William Cronin WALLACE, David Alston LIDE
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Patent number: 10415365Abstract: A method of controlling a direction of drilling of the drill string used to form an opening in a subsurface formation, comprises varying a speed of the drill string during rotational drilling such that the drill string is at a first speed during a first portion of the rotational cycle and at a second speed during a second portion of the rotational cycle wherein the first speed is higher than the second speed, and wherein operating at the second speed in the second portion of the rotational cycle causes the drill string to change the direction of drilling.Type: GrantFiled: May 24, 2017Date of Patent: September 17, 2019Assignee: SHELL OIL COMPANYInventors: David Alston Edbury, Jose Victor Guerrero, Duncan Charles Macdonald, James Bryon Rogers, Donald Ray Sitton, Jason B. Norman
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Patent number: 9879490Abstract: A method of automatically placing a drill bit used to form an opening in a subsurface formation on a bottom of the opening being formed comprises a) increasing a flow rate in a drill string to a target flow; b) controlling a flow rate of fluid into the drill string to be substantially the same as a flowrate of fluid out of the opening; c) allowing a fluid pressure to reach a relatively steady state; and d) automatically moving the drill bit toward the bottom of the opening at a selected rate of advance until an increase in measured differential pressure indicates that the drill bit is at the bottom of the opening.Type: GrantFiled: October 11, 2012Date of Patent: January 30, 2018Assignee: SHELL OIL COMPANYInventors: David Alston Edbury, Jose Victor Guerrero, Duncan Charles MacDonald, James Bryon Rogers, Donald Ray Sitton, Jason B. Norman
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Patent number: 9822595Abstract: A method of automatically placing a drill bit used to form an opening in a subsurface formation on a bottom of the opening being formed comprises a) increasing a flow rate in a drill string to a target flow; b) controlling a flow rate of fluid into the drill string to be substantially the same as a flowrate of fluid out of the opening; c) allowing a fluid pressure to reach a relatively steady state; and d) automatically moving the drill bit toward the bottom of the opening at a selected rate of advance until an increase in measured differential pressure indicates that the drill bit is at the bottom of the opening.Type: GrantFiled: October 11, 2012Date of Patent: November 21, 2017Assignee: SHELL OIL COMPANYInventors: David Alston Edbury, Jose Victor Guerrero, Duncan Charles MacDonald, James Bryon Rogers, Donald Ray Sitton, Jason B. Norman
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Publication number: 20170260822Abstract: A method of controlling a direction of drilling of the drill string used to form an opening in a subsurface formation, comprises varying a speed of the drill string during rotational drilling such that the drill string is at a first speed during a first portion of the rotational cycle and at a second speed during a second portion of the rotational cycle wherein the first speed is higher than the second speed, and wherein operating at the second speed in the second portion of the rotational cycle causes the drill string to change the direction of drilling.Type: ApplicationFiled: May 24, 2017Publication date: September 14, 2017Inventors: David Alston EDBURY, Jose Victor GUERRERO, Duncan Charles MACDONALD, James Bryon ROGERS, Donald Ray SITTON, Jason B. NORMAN
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Patent number: 9683418Abstract: The present disclosure provides a method for picking up a drill bit off the bottom of an opening in a subsurface formation. The method includes setting a predetermined level of differential pressure across a mud motor at which pickup of the drill bit is to be initiated, and monitoring the differential pressure across the mud motor. The method also includes allowing differential pressure across the mud motor to decrease to the predetermined level, and when the predetermined level is reached, automatically picking up the drill bit.Type: GrantFiled: October 11, 2012Date of Patent: June 20, 2017Assignee: Shell Oil CompanyInventors: David Alston Edbury, Jose Victor Guerrero, Duncan Charles MacDonald, James Bryon Rogers, Donald Ray Sitton
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Patent number: 9470052Abstract: A method of assessing hole cleaning effectiveness of drilling comprises a) determining a mass of cuttings removed from a well wherein determining the mass of cuttings removed from a well comprises: i) measuring a total mass of fluid entering a well; ii) measuring a total mass of fluid exiting the well; and iii) determining a difference between the total mass of fluid exiting the well and total mass of fluid entering the well; b) determining a mass of rock excavated in the well; and c) determining a mass of cuttings remaining in the well wherein determining the mass of cuttings remaining in the well comprises: determining a difference between the determined mass of rock excavated in the well and the determined mass of cuttings removed from the well.Type: GrantFiled: August 6, 2013Date of Patent: October 18, 2016Assignee: Shell Oil CompanyInventors: David Alston Edbury, Jose Victor Guerrero, Duncan Charles MacDonald, James Bryon Rogers, Donald Ray Sitton, Jason Norman