Abstract: The difficulty with integrating packaged devices into a dual composite module design for wafer scale devices is the height difference between the WSI and packaged devices a typical wafer scale device is 0.025 (in) high while typical packaged VLSI components are 0.080 (in) or more. This leaves little room for the other 5 layers of interconnect boards and PCI layers required for the dual composite module. The solution is that the PWB on the side of the composite heat sink has been shortened to support only the wafer scale device on the heat sink. This eliminated PWB thickness and PCI interfaces from the side with the VLSI components. Also 3-P connectors are made with a pressure contact interconnecting (PCI) board.

Abstract: Both a system and a method are provided for electrically and mechanically connecting at least one integrated circuit die to a solderless printed wiring board of the type which uses connecting interfaces which include an array of resilient electrical connector means held within a sheet of compliant, insulating material. The system of the invention generally comprises a fanout interface formed from a sheet of insulating material integrally connected to the side of an integrated circuit die that includes the bond pads associated with such dies, wherein the fanout interface includes an internal array of contact pads that are connected to the bond pads of the die, and an external array of contact pads on its exterior surface which are advantageously spaced farther apart than the bond pads of the die.

Abstract: The invention is an improved chip carrier assembly utilizing a cavity-down chip carrier with a pad grid array wherein the IC chip within the chip carrier is mounted against a surface opposite the PWB to which the chip carrier is attached such that heat transfer from the IC chip may occur along a short path to a heat sink such that a large heat transfer rate is possible. Furthermore, the apparatus utilizes an alignment and electrical connection means between the contact pads of the chip carrier and a PWB to which the chip carrier is attached to compensate for shrinkage variation which occurs during the chip carrier fabrication process. Furthermore, within the cavity of the chip carrier there is space for additional components such as a decoupling capacitors. This permits the design of an apparatus providing better heat transfer properties, more accurate contact pad locations and the option of including within the chip carrier components which in the past had been mounted outside of the chip carrier.

Abstract: The invention is a fine line electrical cable with two ends having a plurality of first conductor lines in a plane. The lines of the cable are embedded in an insulating laminate material, are closely spaced at one end to be compatible with the closely spaced contacts from IC chips and are fanned out along the length of the cable to the other end where the lines are spaced somewhat apart and compatible with conventional electrical connectors. Contact posts extent from each line end so that external connections may be made with the IC chips and the conventional connectors. At least one second conductor line may be embedded within the other side of the laminate material and appropriate contact posts extend from the line ends so that external connections may also be made at these locations. A method for fabricating the fine line elecrical cable is also disclosed.

Abstract: A solderless printed wiring board module for receiving and securing surface mounted solderless electronic component carrier and electronic components without carrier upon a printed wiring board, the module also providing a heat transfer path to a surface away from the printed wiring board and the module further adaptable to electrical and mechanical attachment to similar modules placed adjacent to said module to form a multi-module assembly.