Patents by Inventor David B. Rutledge
David B. Rutledge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8073392Abstract: The invention is a radio transmitter that includes an antenna having at least one driven element and at least one reflector element. The driven element is electrically coupled to a radio carrier source. At least one of the driven elements or the at least one reflector element, includes at least one switch to modulate the radio carrier. Also, a secure communication system includes a radio transmitter configured to transmit a modulated signal within an information beam width. Also, a method for modulating a radio signal includes the steps of causing the transmitted carrier signal to be modulated by the modulation signal in response to switching the at least one reflector switch. Also, a method for selecting desirable antenna reflector switch combinations includes performing a mathematical simulation to determine whether the combination of reflector switch positions results in a modulated signal that can be demodulated within an information beam width.Type: GrantFiled: May 4, 2007Date of Patent: December 6, 2011Assignee: California Institute of TechnologyInventors: Aydin Babakhani, David B. Rutledge, Seyed Ali Hajimiri
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Publication number: 20090002071Abstract: The present invention discloses a distributed power amplifier topology and device that efficiently and economically enhances the power output of an RF signal to be amplified. The power amplifier comprises a plurality of push-pull amplifiers interconnected in a novel circular geometry that preferably function as a first winding of an active transformer having signal inputs of adjacent amplification devices driven with an input signal of equal magnitude and opposite phase. The topology also discloses the use of a secondary winding that matches the geometry of primary winding and variations thereof that serve to efficiently combine the power of the individual power amplifiers. The novel architecture enables the design of low-cost, fully-integrated, high-power amplifiers in the RF, microwave, and millimeter-wave frequencies.Type: ApplicationFiled: September 12, 2008Publication date: January 1, 2009Inventors: Ichiro Aoki, Seyed-Ali Hajimiri, David B. Rutledge, Scott David Kee
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Patent number: 7075371Abstract: The present invention discloses a distributed power amplifier topology and device that efficiently and economically enhances the power output of an RF signal to be amplified. The power amplifier comprises a plurality of push-pull amplifiers interconnected in a novel circular geometry that preferably function as a first winding of an active transformer having signal inputs of adjacent amplification devices driven with an input signal of equal magnitude and opposite phase. The topology also discloses the use of a secondary winding that matches the geometry of primary winding and variations thereof that serve to efficiently combine the power of the individual power amplifiers. The novel architecture enables the design of low-cost, fully-integrated, high-power amplifiers in the RF, microwave, and millimeter-wave frequencies.Type: GrantFiled: September 16, 2004Date of Patent: July 11, 2006Assignee: California Institute of TechnologyInventors: Ichiro Aoki, Seyed-Ali Hajimiri, David B. Rutledge, Scott David Kee
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Patent number: 6930556Abstract: A system for amplifying a signal is provided. The system includes a wave guide and an active loop amplifier disposed in the wave guide. The active loop amplifier receives the signal and generates a magnetic field in response to the signal, such as one that couples to the propagating mode of the wave guide.Type: GrantFiled: March 26, 2003Date of Patent: August 16, 2005Assignee: California Institute of TechnologyInventors: David B. Rutledge, James Rosenberg, Ichiro Aoki, Scott D. Kee, Michael P. DeLisio, Jr.
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Patent number: 6816012Abstract: The present invention discloses a distributed power amplifier topology and device that efficiently and economically enhances the power output of an RF signal to be amplified. The power amplifier comprises a plurality of push-pull amplifiers interconnected in a novel circular geometry that preferably function as a first winding of an active transformer having signal inputs of adjacent amplification devices driven with an input signal of equal magnitude and opposite phase. The topology also discloses the use of a secondary winding that matches the geometry of primary winding and variations thereof that serve to efficiently combine the power of the individual power amplifiers. The novel architecture enables the design of low-cost, fully-integrated, high-power amplifiers in the RF, microwave, and millimeter-wave frequencies.Type: GrantFiled: October 9, 2001Date of Patent: November 9, 2004Assignee: California Institute of TechnologyInventors: Ichiro Aoki, Seyed-Ali Hajimiri, David B. Rutledge, Scott David Kee
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Patent number: 6784732Abstract: The present invention discloses a new family of switching amplifier classes called “class E/F amplifiers.” These amplifiers are generally characterized by their use of the zero-voltage-switching (ZVS) phase correction technique to eliminate of the loss normally associated with the inherent capacitance of the switching device as utilized in class-E amplifiers, together with a load network for improved voltage and current wave-shaping by presenting class-F−1 impedances at selected overtones and class-E impedances at the remaining overtones. The present invention discloses a several topologies and specific circuit implementations for achieving such performance.Type: GrantFiled: November 18, 2003Date of Patent: August 31, 2004Assignee: California Institute of TechnologyInventors: Seyed-Ali Hajimiri, Ichiro Aoki, David B. Rutledge, Scott David Kee
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Publication number: 20040113689Abstract: The present invention discloses a new family of switching amplifier classes called “class E/F amplifiers.” These amplifiers are generally characterized by their use of the zero-voltage-switching (ZVS) phase correction technique to eliminate of the loss normally associated with the inherent capacitance of the switching device as utilized in class-E amplifiers, together with a load network for improved voltage and current wave-shaping by presenting class-F−1 impedances at selected overtones and class-E impedances at the remaining overtones. The present invention discloses a several topologies and specific circuit implementations for achieving such performance.Type: ApplicationFiled: November 18, 2003Publication date: June 17, 2004Inventors: Seyed-Ali Hajimiri, Ichiro Aoki, David B. Rutledge, Scott David Kee
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Patent number: 6737948Abstract: The present invention discloses a distributed power amplifier topology and device that efficiently and economically enhances the power output of an RF signal to be amplified. The power amplifier comprises a plurality of push-pull amplifiers interconnected in a novel circular geometry that preferably function as a first winding of an active transformer having signal inputs of adjacent amplification devices driven with an input signal of equal magnitude and opposite phase. The topology also discloses the use of a secondary winding that matches the geometry of primary winding and variations thereof that serve to efficiently combine the power of the individual power amplifiers. The novel architecture enables the design of low-cost, fully-integrated, high-power amplifiers in the RF, microwave, and millimeter-wave frequencies.Type: GrantFiled: February 28, 2003Date of Patent: May 18, 2004Assignee: California Institute of TechnologyInventors: Ichiro Aoki, Seyed-Ali Hajimiri, David B. Rutledge, Scott David Kee
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Patent number: 6724255Abstract: The present invention discloses a new family of switching amplifier classes called “class E/F amplifiers.” These amplifiers are generally characterized by their use of the zero-voltage-switching (ZVS) phase correction technique to eliminate of the loss normally associated with the inherent capacitance of the switching device as utilized in class-E amplifiers, together with a load network for improved voltage and current wave-shaping by presenting class-F−1 impedances at selected overtones and class-E impedances at the remaining overtones. The present invention discloses a several topologies and specific circuit implementations for achieving such performance.Type: GrantFiled: October 9, 2001Date of Patent: April 20, 2004Assignee: California Institute of TechnologyInventors: Scott David Kee, Ichiro Aoki, Seyed-Ali Hajimiri, David B. Rutledge
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Publication number: 20030184385Abstract: A system for amplifying a signal is provided. The system includes a wave guide and an active loop amplifier disposed in the wave guide. The active loop amplifier receives the signal and generates a magnetic field in response to the signal, such as one that couples to the propagating mode of the wave guide.Type: ApplicationFiled: March 26, 2003Publication date: October 2, 2003Inventors: David B. Rutledge, James Rosenberg, Ichiro Aoki, Scott D. Kee, Michael P. DeLisio
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Publication number: 20030184369Abstract: The present invention discloses a distributed power amplifier topology and device that efficiently and economically enhances the power output of an RF signal to be amplified. The power amplifier comprises a plurality of push-pull amplifiers interconnected in a novel circular geometry that preferably function as a first winding of an active transformer having signal inputs of adjacent amplification devices driven with an input signal of equal magnitude and opposite phase. The topology also discloses the use of a secondary winding that matches the geometry of primary winding and variations thereof that serve to efficiently combine the power of the individual power amplifiers. The novel architecture enables the design of low-cost, fully-integrated, high-power amplifiers in the RF, microwave, and millimeter-wave frequencies.Type: ApplicationFiled: February 28, 2003Publication date: October 2, 2003Inventors: Ichiro Aoki, Seyed-Ali Hajimiri, David B. Rutledge, Scott David Kee
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Patent number: 6583672Abstract: The present invention relates to a bias tracking network that manipulates the DC value of the control voltage applied to the active devices in each quasi-optic cell within an array of cells. The purpose of this network is to compensate for variations in the main DC bias supply voltage provided to each cell. In one embodiment, the bias tracking network includes a set of resistive voltage dividers at the boundary of each cell, together with resistors inserted within the conductors that carry a reference voltage from which the control voltage for each cell is derived. This impedance network introduced at each cell boundary causes the control voltage to “track” the variation in the voltage of the return lead (i.e., the “ground lead”) at each cell in the array, in order to maintain a consistent (or desired) control voltage distribution to each cell in the array.Type: GrantFiled: June 5, 2001Date of Patent: June 24, 2003Assignee: California Institute of TechnologyInventors: Blythe C. Deckman, David B. Rutledge
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Patent number: 6559724Abstract: The present invention discloses active unit cell topologies for quasi-optic grid array structures that make use of combinations of one of several broadband or frequency-selective positive (or regenerative) feedback networks, as well as multiple transistor configurations in order to enhance the gain of the grid array amplifier. These new topologies yield higher gain, extending the utility of the grid array amplifier to both new applications requiring higher gain, as well as to higher frequencies where the intrinsic gain of the active devices is lower. They also offer greater flexibility in impedance matching, improving the bandwidth and manufacturability of the design.Type: GrantFiled: June 5, 2001Date of Patent: May 6, 2003Assignee: California Institute of TechnologyInventors: James J. Rosenberg, Blythe C. Deckman, David B. Rutledge, Michael P. DeLisio, Jr., Chun-Tung Cheung
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Patent number: 6542662Abstract: The present invention discloses a simple adapter that transitions between a standard rectangular waveguide environment and the quasi-plane wave (quasi-TEM mode) environment of an active grid array assembly. The device may serve as a mode expanding waveguide feed or as a mode contracting waveguide collector.Type: GrantFiled: June 5, 2001Date of Patent: April 1, 2003Assignee: California Institute of TechnologyInventors: Chun-Tung Cheung, David B. Rutledge
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Patent number: 6538793Abstract: The present invention discloses an electronically frequency tunable and phase modulatable quasi-optic grid oscillator. The oscillator includes a reference signal input port whereby a small external reference signal is introduced that entrains the frequency and phase of the oscillator signal to it. Amplitude modulation techniques are introduced to further enhance the utility of the oscillator as a modulator.Type: GrantFiled: June 5, 2001Date of Patent: March 25, 2003Assignee: California Institute of TechnologyInventors: James J. Rosenberg, Blythe C. Deckman, David B. Rutledge
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Publication number: 20020135422Abstract: The present invention discloses a distributed power amplifier topology and device that efficiently and economically enhances the power output of an RF signal to be amplified. The power amplifier comprises a plurality of push-pull amplifiers interconnected in a novel circular geometry that preferably function as a first winding of an active transformer having signal inputs of adjacent amplification devices driven with an input signal of equal magnitude and opposite phase. The topology also discloses the use of a secondary winding that matches the geometry of primary winding and variations thereof that serve to efficiently combine the power of the individual power amplifiers. The novel architecture enables the design of low-cost, fully-integrated, high-power amplifiers in the RF, microwave, and millimeter-wave frequencies.Type: ApplicationFiled: October 9, 2001Publication date: September 26, 2002Inventors: Ichiro Aoki, Seyed-Ali Hajimiri, David B. Rutledge, Scott David Kee
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Publication number: 20020101284Abstract: The present invention discloses a new family of switching amplifier classes called “class E/F amplifiers.” These amplifiers are generally characterized by their use of the zero-voltage-switching (ZVS) phase correction technique to eliminate of the loss normally associated with the inherent capacitance of the switching device as utilized in class-E amplifiers, together with a load network for improved voltage and current wave-shaping by presenting class-F−1 impedances at selected overtones and class-E impedances at the remaining overtones. The present invention discloses a several topologies and specific circuit implementations for achieving such performance.Type: ApplicationFiled: October 9, 2001Publication date: August 1, 2002Inventors: Scott David Kee, Ichiro Aoki, Seyed-Ali Hajimiri, David B. Rutledge
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Publication number: 20020024719Abstract: The present invention discloses active unit cell topologies for quasi-optic grid array structures that make use of combinations of one of several broadband or frequency-selective positive (or regenerative) feedback networks, as well as multiple transistor configurations in order to enhance the gain of the grid array amplifier. These new topologies yield higher gain, extending the utility of the grid array amplifier to both new applications requiring higher gain, as well as to higher frequencies where the intrinsic gain of the active devices is lower. They also offer greater flexibility in impedance matching, improving the bandwidth and manufacturability of the design.Type: ApplicationFiled: June 5, 2001Publication date: February 28, 2002Inventors: James J. Rosenberg, Blythe C. Deckman, David B. Rutledge, Michael P. Delisio, Chung-Tung Cheung
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Publication number: 20020024387Abstract: The present invention relates to a bias tracking network that manipulates the DC value of the control voltage applied to the active devices in each quasi-optic cell within an array of cells. The purpose of this network is to compensate for variations in the main DC bias supply voltage provided to each cell. In one embodiment, the bias tracking network includes a set of resistive voltage dividers at the boundary of each cell, together with resistors inserted within the conductors that carry a reference voltage from which the control voltage for each cell is derived. This impedance network introduced at each cell boundary causes the control voltage to “track” the variation in the voltage of the return lead (i.e., the “ground lead”) at each cell in the array, in order to maintain a consistent (or desired) control voltage distribution to each cell in the array.Type: ApplicationFiled: June 5, 2001Publication date: February 28, 2002Inventors: Blythe C. Deckman, David B. Rutledge
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Publication number: 20020021865Abstract: The present invention discloses a simple adapter that transitions between a standard rectangular waveguide environment and the quasi-plane wave (quasi-TEM mode) environment of an active grid array assembly. The device may serve as a mode expanding waveguide feed or as a mode contracting waveguide collector.Type: ApplicationFiled: June 5, 2001Publication date: February 21, 2002Inventors: Chun-Tung Cheung, David B. Rutledge