Patents by Inventor David Black

David Black has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11145312
    Abstract: A method may include obtaining first audio data originating at a first device during a communication session between the first device and a second device. The method may also include obtaining an availability of revoiced transcription units in a transcription system and in response to establishment of the communication session, selecting, based on the availability of revoiced transcription units, a revoiced transcription unit instead of a non-revoiced transcription unit to generate a transcript of the first audio data. The method may also include obtaining revoiced audio generated by a revoicing of the first audio data by a captioning assistant and generating a transcription of the revoiced audio using an automatic speech recognition system. The method may further include in response to selecting the revoiced transcription unit, directing the transcription of the revoiced audio to the second device as the transcript of the first audio data.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: October 12, 2021
    Assignee: Sorenson IP Holdings, LLC
    Inventors: David Thomson, David Black, Jonathan Skaggs, Kenneth Boehme, Shane Roylance
  • Publication number: 20210311899
    Abstract: Presented herein are systems and methods for facilitating access control among elements of a non-volatile memory express (NVMe) entity in an NVMe-over-Fabric (NVMe-oF) environment. In one or more embodiments, NVMe entities, whether NVMe hosts or NVMe subsystems, can obtain information about elements of NVMe entities that have registered with a centralized storage fabric service component via a discovery controller of the centralize service. In one or more embodiments, based upon information received from requesting NVMe entities, the centralized storage fabric service creates and maintains a data store of zones, in which a zone comprises a listing of elements of NVMe entities that are members of that zone and have access rights relative to other members of that zone.
    Type: Application
    Filed: June 10, 2020
    Publication date: October 7, 2021
    Applicant: DELL PRODUCTS L.P.
    Inventors: Erik SMITH, Joseph LaSalle WHITE, David BLACK, Raja SUBBIAH
  • Patent number: 11138121
    Abstract: A data management method for a processor to which a first cache, a second cache, and a behavior history table are allocated, includes tracking reuse information learning cache lines stored in at least one of the first cache and the second cache; recording the reuse information in the behavior history table; and determining a placement policy with respect to future operations that are to be performed on a plurality of cache lines stored in the first cache and the second cache, based on the reuse information in the behavior history table.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: October 5, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Erik Ernst Hagersten, Andreas Karl Sembrant, David Black-Schaffer
  • Publication number: 20210286745
    Abstract: Presented herein are embodiments for registering elements of a non-volatile memory express (NVMe) entity in an NVMe-over-Fabric (NVMe-oF) environment. In embodiments, a method for registering with a centralized storage fabric service component via a discovery controller (DC) of the centralize service comprises transmitting a DC registration command to the DC. In embodiments, the DC registration command includes a number of registration entries that the NVMe entity will be submitting for registration. In embodiments, the identified number of NVMe registration entries are transmitted to the centralized service and are stored in a registry. The NVMe registration entry may include an entry type for indicating an NVMe registration entry type, an NVMe qualified name (NQN) for identifying the NVMe entity, and a transport address for specifying an address of the element of the NVMe entity. Other NVMe entities may query the registry to obtain information about NVMe elements in the system.
    Type: Application
    Filed: March 16, 2020
    Publication date: September 16, 2021
    Applicant: DELL PRODUCTS L.P.
    Inventors: Erik SMITH, Joseph LaSalle WHITE, David BLACK, Raja SUBBIAH
  • Publication number: 20210289027
    Abstract: Presented herein are embodiments for implicitly or indirectly registering elements of a non-volatile memory express (NVMe) entity in an NVMe-over-Fabric (NVMe-oF) environment. In one or more embodiments, one or more interactions between an NVMe entity and a centralized storage fabric service component, such as part of the Link Layer Discovery Protocol (LLDP) process or the Multicast Domain Name System (mDNS) process, may be used by the centralized storage fabric service to extract information about the NVMe entity and automatically register it with a centralized registration datastore. In one or more embodiments, the centralized registration datastore may be used to facilitate services in the NVMe-oF system, such as discovery of NVMe entities, provisioning, and access control. In one or more embodiments, an implicitly registered NVMe entity may also subsequently explicitly register, which may include supplying additional information about the NVMe entity.
    Type: Application
    Filed: June 10, 2020
    Publication date: September 16, 2021
    Applicant: DELL PRODUCTS L.P.
    Inventors: Erik SMITH, Joseph LaSalle WHITE, David BLACK, Raja SUBBIAH
  • Publication number: 20210286741
    Abstract: Presented herein are embodiments for providing and using a symbolic name for referencing an element of a non-volatile memory express (NVMe) entity in an NVMe-over-Fabric (NVMe-oF) environment. In one or more embodiments, the symbolic name may be used to identify an element of an NVMe host or NVM subsystem in one or more processes. In one or more embodiments, a symbolic name may be provided as part of a registration process. Symbolic names may be used for identifying elements when performing other processes, such as masking and zoning for granting access rights. In one or more embodiments, a symbolic name may be shared by two or more elements.
    Type: Application
    Filed: July 9, 2020
    Publication date: September 16, 2021
    Applicant: DELL PRODUCTS L.P.
    Inventors: Erik SMITH, Joseph LaSalle WHITE, David BLACK, Raja SUBBIAH
  • Patent number: 11052890
    Abstract: An integrated power brake unit (20) includes an input rod (30) operable to receive a driver braking input force, a booster operable to boost the driver braking input force, a master cylinder, a pump operable to provide pressurized fluid for braking, in lieu of the master cylinder, in response to the driver braking input force, and a fluid reservoir (36) defining a main chamber. The fluid reservoir (36) has first and second outlet ports (P1, P2) in fluid communication to supply the master cylinder, and a third outlet port (P3) in fluid communication to supply the pump, each of the first, second, and third outlet ports (P1, P2, P3) being provided in a bottom wall (48) of the fluid reservoir (36). The fluid reservoir (36) includes a sub-chamber (42) within the main chamber, the sub-chamber (42) covering the third outlet port (P3), and defining an opening (56) to the main chamber at a forward-most end of the sub-chamber (42).
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: July 6, 2021
    Assignee: Robert Bosch GmbH
    Inventors: Scott Spencer, David Black
  • Patent number: 11017778
    Abstract: A method may include obtaining first audio data originating at a first device during a communication session between the first device and a second device. The method may also include obtaining an availability of revoiced transcription units in a transcription system and in response to establishment of the communication session, selecting, based on the availability of revoiced transcription units, a revoiced transcription unit instead of a non-revoiced transcription unit to generate a transcript of the first audio data. The method may also include obtaining revoiced audio generated by a revoicing of the first audio data by a captioning assistant and generating a transcription of the revoiced audio using an automatic speech recognition system. The method may further include in response to selecting the revoiced transcription unit, directing the transcription of the revoiced audio to the second device as the transcript of the first audio data.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: May 25, 2021
    Assignee: Sorenson IP Holdings, LLC
    Inventors: David Thomson, David Black, Jonathan Skaggs, Kenneth Boehme, Shane Roylance
  • Patent number: 10956245
    Abstract: A storage system in one embodiment comprises a host processor, and a solid-state storage device coupled to the host processor and comprising a non-volatile memory and a storage controller. The host processor is configured to initiate an error scanning operation on a designated portion of the non-volatile memory by directing at least one read command to the storage controller. The read command is configured to indicate to the storage controller that data read from the non-volatile memory responsive to the read command is not to be returned to the host processor. For example, the read command may illustratively comprise a Scatter Gather List (SGL) bit bucket descriptor indicating that the data read from the non-volatile memory responsive to the read command is to be discarded rather than returned to the host processor. The storage controller records any detected errors in a media error log and notifies the host processor of such errors.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: March 23, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Amnon Izhar, Patrick Weiler, Stephen Richard Ives, Michael D. Garvey, Dale Elliott, David Black
  • Patent number: 10921859
    Abstract: A method of making an electronics enclosure that is light-weight, structurally sound and EMI resistant is provided. Preferably the electronics enclosure is made by covering the walls of a mold for the chassis and the lid with a metallic mesh. At least two plies of carbon prepreg are applied over the metallic mesh. The carbon prepreg and metallic mesh are then cured together at high temperature, typically in an autoclave. The wire mesh becomes integrated into the composite material during the curing process when the carbon material shrinks to the mold and the epoxy bonds with the wire mesh. The molds may then be removed leaving an electronics enclosure with superior properties.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: February 16, 2021
    Assignee: SECURAPLANE TECHNOLOGIES, INC.
    Inventors: Brandon Ross Mahoney, Sarajin Ali, Dennis Keith Moxley, Andrew Keith Dickerson, Thomas David Black
  • Patent number: 10915466
    Abstract: Caches may be vulnerable to side-channel attacks, such as Spectre and Meltdown, that involve speculative execution of instructions, revealing information about a cache that the attacker is not permitted to access. Access permission may be stored in the cache, such as in an entry of a cache table or in the region information for a cache table. Optionally, the access permission may be re-checked if the access permission changes while a memory instruction is pending. Optionally, a random index value may be stored in a cache and used, at least in part, to identify a memory location of a cacheline. Optionally, cachelines that are involved in speculative loads for memory instructions may be marked as speculative. On condition of resolving the speculative load as non-speculative, the cacheline may be marked as non-speculative; and on condition of resolving the speculative load as mis-speculated, the cacheline may be removed from the cache.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: February 9, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Erik Ernst Hagersten, David Black-Schaffer, Stefanos Kaxiras
  • Patent number: 10901080
    Abstract: A system is provided for monitoring and predicting traffic conditions in a vicinity of a system vehicle having a stop indicator system. The system may include one or more radar modules programmed to detect target vehicles traveling within a predetermined radar detection area near the system vehicle. The radar modules may be further programmed to detect signals associated with target vehicles and generate signals indicative of alert conditions. The radar modules may be programmed to execute various algorithms which generate alert condition signals in response to determining and analyzing a current distance, a braking distance, and/or a velocity of the target vehicle detected in the radar detection area. The system can communicate appropriate alert notifications in response to the generated alert condition signals.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: January 26, 2021
    Assignee: FLEETMIND SEON SOLUTIONS INC.
    Inventors: Robert Nagy, David Black, Tomas Brodsky, Rachel Wong, Bradley Edmund Tyrone Green
  • Patent number: 10866891
    Abstract: A multiprocessor system includes a plurality of nodes and at least one memory, wherein each node includes at least one processor, a first cache private to the node, a second cache at a higher level than the first cache, and a cache location buffer (CLB) private to the node, wherein, for at least one node of the plurality of nodes, at least one of the first cache and the second cache included in the at least one node includes at least one cache location that is capable of storing a compressed data unit of varying size, the CLB included in the at least one node is configured to store a plurality of CLB entries, each of the CLB entries including a plurality of location information values.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: December 15, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Erik Ernst Hagersten, Andreas Karl Sembrant, David Black-Schaffer
  • Publication number: 20200364144
    Abstract: Data units are stored in private caches in nodes of a multiprocessor system, each node containing at least one processor (CPU), at least one cache private to the node and at least one cache locations buffer {CLB} private to the node. In each CLB location information values are stored, each location information value indicating a location associated with a respective data unit, wherein each location information value stored in a given CLB indicates the location to be either a location within the private cache disposed in the same node as the given CLB, to be a location in one of the other nodes, or to be a location in a main memory. Coherence of values of the data units is maintained using a cache coherence protocol The location information values stored in the CLBs are updated by the cache coherence protocol in accordance with movements of their respective data units.
    Type: Application
    Filed: August 3, 2020
    Publication date: November 19, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Erik HAGERSTEN, Andreas SEMBRANT, David BLACK-SCHAFFER
  • Patent number: 10803107
    Abstract: Computer-implemented systems and methods for synthesis of concept definitions and concept relationships from a domain of data, utilizing different semantic processing protocols such as formal concept analysis and faceted classification synthesis from existing domain concepts that have a confidence gradient built into them. A cognitive or an input agent provides an input of an active concept which is matched against existing domain concepts. The resultant pool of relevant domain concepts is then used to derive virtual concept definitions using a semantic processing protocol. The derivation is then overlaid with a concept of relative proximity of an attribute from another within an attribute set. An additional layer of coherence is given by the relative proximity measure. The end result is a pool of related virtual concept definitions in a tree structure.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: October 13, 2020
    Assignee: PRIMAL FUSION INC.
    Inventors: Peter Joseph Sweeney, Alexander David Black
  • Publication number: 20200290582
    Abstract: An integrated power brake unit (20) includes an input rod (30) operable to receive a driver braking input force, a booster operable to boost the driver braking input force, a master cylinder, a pump operable to provide pressurized fluid for braking, in lieu of the master cylinder, in response to the driver braking input force, and a fluid reservoir (36) defining a main chamber. The fluid reservoir (36) has first and second outlet ports (P1, P2) in fluid communication to supply the master cylinder, and a third outlet port (P3) in fluid communication to supply the pump, each of the first, second, and third outlet ports (P1, P2, P3) being provided in a bottom wall (48) of the fluid reservoir (36). The fluid reservoir (36) includes a sub-chamber (42) within the main chamber, the sub-chamber (42) covering the third outlet port (P3), and defining an opening (56) to the main chamber at a forward-most end of the sub-chamber (42).
    Type: Application
    Filed: March 8, 2017
    Publication date: September 17, 2020
    Inventors: Scott Spencer, David Black
  • Patent number: 10754777
    Abstract: Data units are stored in private caches in nodes of a multiprocessor system, each node containing at feast one processor (CPU), at least one cache private to the node and at least one cache location buffer {CLB} private to the node. In each CLB location information values are stored, each location information value indicating a location associated with a respective data unit, wherein each location information value stored in a given CLB indicates the location to be either a location within the private cache disposed in the same node as the given CLB, to be a location in one of the other nodes, or to be a location in a main memory. Coherence of values of the data units is maintained using a cache coherence protocol The location information values stored in the CLBs are updated by the cache coherence protocol in accordance with movements of their respective data units.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: August 25, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Erik Hagersten, Andreas Sembrant, David Black-Schaffer
  • Publication number: 20200243094
    Abstract: A method may include obtaining first audio data originating at a first device during a communication session between the first device and a second device. The method may also include obtaining an availability of revoiced transcription units in a transcription system and in response to establishment of the communication session, selecting, based on the availability of revoiced transcription units, a revoiced transcription unit instead of a non-revoiced transcription unit to generate a transcript of the first audio data. The method may also include obtaining revoiced audio generated by a revoicing of the first audio data by a captioning assistant and generating a transcription of the revoiced audio using an automatic speech recognition system. The method may further include in response to selecting the revoiced transcription unit, directing the transcription of the revoiced audio to the second device as the transcript of the first audio data.
    Type: Application
    Filed: April 13, 2020
    Publication date: July 30, 2020
    Inventors: David Thomson, David Black, Jonathan Skaggs, Kenneth Boehme, Shane Roylance
  • Patent number: 10671543
    Abstract: Methods and systems which, for example, reduce energy usage in cache memories are described. Cache location information regarding the location of cachelines which are stored in a tracked portion of a memory hierarchy is stored in a cache location table. Address tags are stored with corresponding location information in the cache location table to associate the address tag with the cacheline and its cache location information. When a cacheline is moved to a new location in the memory hierarchy, the cache location table is updated so that the cache location information indicates where the cacheline is located within the memory hierarchy.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: June 2, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Erik Hagersten, Andreas Sembrant, David Black-Schaffer, Stefanos Kaxiras
  • Publication number: 20200137349
    Abstract: In some implementations, a user device can be configured to create media messages with automatic titling. For example, a user can create a media messaging project that includes multiple video clips. The video clips can be generated based on video data and/or audio data captured by the user device and/or based on pre-recorded video data and/or audio data obtained from various storage locations. When the user device captures the audio data for a clip, the user device can obtain a speech-to-text transcription of the audio data in near real time and present the transcription data (e.g., text) overlaid on the video data while the video data is being captured or presented by the user device.
    Type: Application
    Filed: December 26, 2019
    Publication date: April 30, 2020
    Applicant: Apple Inc.
    Inventors: David Black, Andrew L. Harding, Joseph-Alexander P. Weil, James Brasure, Joash S. Berkeley, Katherine K. Ernst, Richard Salvador, Stephen Sheeler, William D. Cummings, Xiaohuan Corina Wang, Robert L. Clark, Kevin M. O'Neil