Abstract: A multiple video data bus architecture permits high speed data transfer among the various circuit elements of a fluoroscopic imaging processor. This permits simultaneous acquisition, storage, display, and image enhancement of high resolution, i.e., 2K.times.2K images. A memory interface circuit compresses the video data for storage in bulk memory. The processor supports several high-resolution monitors which can respectively display radiographic images from different subjects, so that review and diagnosis can occur remotely.

Abstract: A method and apparatus for obtaining a profile read-out of an object in a field of view of a solid-state imager without destruction of the image data at the imager. In an application using a CID imager, X-axis and Y-axis projections of the array are obtained by sensing charge transfer from sequentially addressed columns into all rows simultaneously followed by sensing charge transfer from sequentially addressed rows into all columns simultaneously. Calculation of centroid and area of an image can be obtained without the necessity of reading out each pixel.