Abstract: A system board includes at least one microprocessor coupled to the system board. A VR module card includes a voltage regulator circuit, wherein the voltage regulator circuit is configured to provide electrical power to the at least one microprocessor. A circuit board region is configured to receive the VR module card.

Abstract: A system board includes at least one microprocessor coupled to the system board. A first circuit board region is populated with a first model voltage regulator circuit. The first model voltage regulator circuit is configured to provide electrical power to the at least one microprocessor. A second circuit board region is unpopulated and configured to receive a second model voltage regulator circuit.

Abstract: A system for generating and monitoring voltages on a variety of different components on a common printed circuit board. The system includes a programmable controller, a plurality of DC/DC converters for producing voltages for the devices and a plurality of voltage regulators for produced voltages for a plurality of CPUs on the board, such CPU voltages being produced in accordance with VIDs provided to the regulator by the CPU. The programmable controller: establishes a set point voltage for such one of the DC/DC converters; sequentially monitors the produced voltages produced, monitors voltages produced by the regulators for the CPUs by comparing the VIDs to the voltages produced by the regulators, and if during the sequencing any one of the converters is determined by the programmable controller as producing an improper voltage or if the any one of the regulators fails top produce the voltage indicated by the VIDs, disables the board.

Abstract: A data storage interface for coupling data between processors and a bank of disk. The interface includes a plurality of first directors coupled to the processors and a plurality of second directors coupled to the bank of disk drives. A cache memory is coupled between the plurality of first directors and the plurality of second directors. The interface includes a pair of independent power busses. At least one of the first or second directors is coupled to the pair of independent power busses. One portion of the disk drives in the bank is connected to only a first one of the pair of power buses and a different portion of the disk drives is connected to only the other one of the pair of power buses. A power circuit includes a pair of input terminals, each one being electrically connected to a corresponding one of the pair of independent power busses. The circuit includes an output terminal. A pair of switching transistor sections is provided.