Patents by Inventor David De Roest

David De Roest has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230091094
    Abstract: Methods of forming structures including a photoresist absorber layer and structures including the photoresist absorber layer are disclosed. Exemplary methods include forming the photoresist absorber layer that includes at least two elements having an EUV cross section (??) of greater than 2×106 cm2/mol.
    Type: Application
    Filed: August 31, 2022
    Publication date: March 23, 2023
    Inventors: Hannu Huotari, Daniele Piumi, Yoann Tomczak, Ivan Zyulkov, Charles Dezelah, Arpita Saha, David de Roest, Jerome Innocent, Michael Givens, Monica Thukkaram
  • Publication number: 20230071197
    Abstract: Methods of forming structures including a photoresist absorber layer and structures including the photoresist absorber layer are disclosed. Exemplary methods include forming the photoresist absorber layer that includes an element having a relatively high extreme ultraviolet (EUV) sensitivity on a mass basis while having a relatively low EUV sensitivity on a mole basis.
    Type: Application
    Filed: August 31, 2022
    Publication date: March 9, 2023
    Inventors: Arpita Saha, David de Roest, Charles Dezelah, Michael Givens
  • Publication number: 20230077088
    Abstract: Methods of forming structures including a photoresist absorber layer and structures including the absorber layer underlying an extreme ultraviolet (EUV) photoresist are disclosed. Exemplary methods include forming the photoresist absorber layer or underlayer with an oxide of a high atomic number (z) element having an EUV cross section (??) of greater than 2×106 cm2/mol and then forming the EUV photoresist over the high-z underlayer.
    Type: Application
    Filed: August 31, 2022
    Publication date: March 9, 2023
    Inventors: Arpita Saha, David de Roest, Michael Givens, Charles Dezelah, Monica Thukkaram, Daniele Piumi
  • Publication number: 20220216059
    Abstract: Methods and related systems for lithographically defining patterns on a substrate are disclosed. An exemplary method includes forming a structure. The method includes providing a substrate to a reaction chamber. The substrate comprises a semiconductor and a surface layer. The surface layer comprises amorphous carbon. The method further comprises forming a barrier layer on the surface layer and depositing a metal-containing layer on the substrate. The metal- containing layer comprises oxygen and a metal.
    Type: Application
    Filed: January 4, 2022
    Publication date: July 7, 2022
    Inventors: Zecheng Liu, Takashi Yoshida, Ryu Nakano, Ivan Zyulkov, Yiting Sun, Yoann Francis Tomczak, David de Roest
  • Patent number: 11251035
    Abstract: The invention relates to a method of providing a structure by depositing a layer on a substrate in a reactor. The method comprising: introducing a silicon halide precursor in the reactor; introducing a reactant gas comprising oxygen in the reactor; and, providing an energy source to create a plasma from the reactant gas so that the oxygen reacts with the first precursor in a layer comprising silicon dioxide.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: February 15, 2022
    Assignee: ASM IP Holding B.V.
    Inventors: Timothee Blanquart, David de Roest
  • Patent number: 10928731
    Abstract: The disclosure relates to a sequential infiltration synthesis for treatment of infiltrateable material. Examples of the disclosure provide a method of forming a structure that includes providing the substrate with a infiltrateable material in a reaction chamber and infiltrating the infiltrateable material with infiltration material during one or more infiltration cycles.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: February 23, 2021
    Assignee: ASM IP Holding B.V.
    Inventors: Krzysztof Kachel, David de Roest
  • Patent number: 10903113
    Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: January 26, 2021
    Assignee: ASM IP Holding B.V.
    Inventors: Han Wang, Qi Xie, Delphine Longrie, Jan Willem Maes, David de Roest, Julian Hsieh, Chiyu Zhu, Timo Asikainen, Krzysztof Kachel, Harald Profijt
  • Publication number: 20210013037
    Abstract: Methods of forming structures including a photoresist underlayer and structures including the photoresist underlayer are disclosed. Exemplary methods include forming the photoresist underlayer using one or more of plasma-enhanced cyclic (e.g., atomic layer) deposition and plasma-enhanced chemical vapor deposition. Surface properties of the photoresist underlayer can be manipulated using a treatment process.
    Type: Application
    Filed: July 7, 2020
    Publication date: January 14, 2021
    Inventors: Yiting Sun, David de Roest, Daniele Piumi, Ivo Johannes Raaijmakers, BokHeon Kim, Timothee Blanquart, Yoann Tomczak
  • Publication number: 20210005449
    Abstract: The invention relates to a method of providing a structure by depositing a layer on a substrate in a reactor. The method comprising: introducing a silicon halide precursor in the reactor; introducing a reactant gas comprising oxygen in the reactor; and, providing an energy source to create a plasma from the reactant gas so that the oxygen reacts with the first precursor in a layer comprising silicon dioxide.
    Type: Application
    Filed: September 17, 2020
    Publication date: January 7, 2021
    Inventors: Timothee Blanquart, David de Roest
  • Patent number: 10847361
    Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: November 24, 2020
    Assignee: ASM IP HOLDING B.V.
    Inventors: Han Wang, Qi Xie, Delphine Longrie, Jan Willem Maes, David de Roest, Julian Hsieh, Chiyu Zhu, Timo Asikainen
  • Publication number: 20200343089
    Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.
    Type: Application
    Filed: February 11, 2020
    Publication date: October 29, 2020
    Inventors: Han Wang, Qi Xie, Delphine Longrie, Jan Willem Maes, David de Roest, Julian Hsieh, Chiyu Zhu, Timo Asikainen
  • Patent number: 10784102
    Abstract: The invention relates to a method of providing a structure by depositing a layer on a substrate in a reactor. The method comprising: introducing a silicon halide precursor in the reactor; introducing a reactant gas comprising oxygen in the reactor; and, providing an energy source to create a plasma from the reactant gas so that the oxygen reacts with the first precursor in a layer comprising silicon dioxide.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: September 22, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Timothee Blanquart, David de Roest
  • Publication number: 20200266096
    Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.
    Type: Application
    Filed: January 27, 2020
    Publication date: August 20, 2020
    Inventors: Han Wang, Qi Xie, Delphine Longrie, Jan Willem Maes, David de Roest, Julian Hsieh, Chiyu Zhu, Timo Asikainen, Krzysztof Kachel, Harald Profijt
  • Patent number: 10699899
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: June 30, 2020
    Assignee: ASM International N.V.
    Inventors: Raija H. Matero, Linda Lindroos, Hessel Sprey, Jan Willem Maes, David de Roest, Dieter Pierreux, Kees van der Jeugd, Lucia D'Urzo, Tom E. Blomberg
  • Patent number: 10665452
    Abstract: A method for improving source/drain performance through conformal solid state doping and its resulting device are disclosed. Specifically, the doping takes place through an atomic layer deposition of a dopant layer. Embodiments of the invention may allow for an increased doping layer, improved conformality, and reduced defect formation, in comparison to alternate doping methods, such as ion implantation or epitaxial doping.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: May 26, 2020
    Assignee: ASM IP Holdings B.V.
    Inventors: Qi Xie, David de Roest, Jacob Woodruff, Michael Eugene Givens, Jan Willem Maes, Timothee Blanquart
  • Patent number: 10566185
    Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: February 18, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Han Wang, Qi Xie, Delphine Longrie, Jan Willem Maes, David de Roest, Julian Hsieh, Chiyu Zhu, Timo Asikainen
  • Patent number: 10553482
    Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: February 4, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Han Wang, Qi Xie, Delphine Longrie, Jan Willem Maes, David de Roest, Julian Hsieh, Chiyu Zhu, Timo Asikainen, Krzysztof Kachel, Harald Profijt
  • Publication number: 20190318923
    Abstract: The invention relates to a method of providing a structure by depositing a layer on a substrate in a reactor. The method comprising: introducing a silicon halide precursor in the reactor; introducing a reactant gas comprising oxygen in the reactor; and, providing an energy source to create a plasma from the reactant gas so that the oxygen reacts with the first precursor in a layer comprising silicon dioxide.
    Type: Application
    Filed: February 20, 2019
    Publication date: October 17, 2019
    Inventors: Timothee Blanquart, David de Roest
  • Patent number: 10269558
    Abstract: The invention relates to a method of providing a structure by depositing a layer on a substrate in a reactor. The method comprising: introducing a silicon halide precursor in the reactor; introducing a reactant gas comprising oxygen in the reactor; and, providing an energy source to create a plasma from the reactant gas so that the oxygen reacts with the first precursor in a layer comprising silicon dioxide.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: April 23, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Timothee Blanquart, David de Roest
  • Publication number: 20190103303
    Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.
    Type: Application
    Filed: October 12, 2018
    Publication date: April 4, 2019
    Inventors: Han Wang, Qi Xie, Delphine Longrie, Jan Willem Maes, David de Roest, Julian Hsieh, Chiyu Zhu, Timo Asikainen, Krzysztof Kachel, Harald Profijt