Abstract: A method for the isolation of oligomeric 2, 2-difurylpropane (DTHFP) suitable for use on an industrial scale. A method can include using oligomeric 2, 2-difurylpropane, in particular, its use can be as a polar modifier for butadiene and styrene butadiene polymerization so is to produce rubber. Utilizing the material as an alternative to DTHFP in rubber production avoids subsequent leaching of the DTHFP into the environment as the oligomeric 2, 2-difurylpropane (DTHFP) gives rise to much lower levels of leaching.

Abstract: Integrated physical and logical security management is extended to a mobile device, such as a portable wireless device or radio. The Mobile-IMPACT solution extends the reach of authorized users to handheld devices for monitoring, managing and/or controlling of IT/network and physical security. Allowing authorized users to view and control access events while not in their office and logged into their console, mobility within and outside of a facility or campus organization no longer requires a laptop computer. With new handheld technologies more widely accessible and dropping in price while still gaining additional functionality, a chief security officer and their security staff can now monitor access to their building/doors/control zones, look-up user and card information, trigger queries/reports, set new alarm conditions and monitor sensors or a perimeter from a handheld device anywhere in the world using an electronic communication medium, such as a PDA, cell phone, radio, or the like.

Abstract: The disclosure provides a method and a system for identifying and replacing code translations that generate spurious fault events. In one embodiment the method includes executing a first set and a second set of native instructions, performing a third translation of a target instruction to form a third set of native instructions in response to a determination that a fault occurrence is attributed to a first translation, wherein the third set of native instructions is not the same as the second set of native instructions, and the third set of native instructions is not the same as the first set of native instructions, and executing the third set of native instructions.

Abstract: A trackball includes a ball, a housing including a recess arranged to receive at least part of the ball and means for urging the ball, without physical or direct contact, to remain in the recess, wherein the surface of the recess is fully sealed to form an impenetrable barrier such that foreign substances are prevented from entering the interior of the housing. This arrangement may make the trackball more hygienic to use and easier to clean than conventional trackballs.

Abstract: A mobile device that can optionally communicate with a server, the mobile device including latitude/longitude determining capabilities, a display, a data communication system and a power source. The mobile device can be used to communicate, provide location information, track an individual, as well as allow alerting, such in a case of an emergency. This location information could be accompanied with one or more of video information, audio information, multimedia information, and pictures taken by the mobile device. The mobile devices also allow inner-communicability among the devices such as text messaging, chat, voice communications, and the like. The capabilities of the mobile device can also be used to determine if the device has traversed a geo-fence, or defined electronic perimeter, with the crossing of the perimeter capable of triggering special functionality such as the turning on of the mobile device, or smart phone, sending an alert, altering functionality, or the like.

Abstract: A processing system comprising a microprocessor core and a translator. Within the microprocessor core is arranged a hardware decoder configured to selectively decode instructions for execution in the microprocessor core, and, a logic structure configured to track usage of the hardware decoder. The translator is operatively coupled to the logic structure and configured to selectively translate the instructions for execution in the microprocessor core, based on the usage of the hardware decoder as determined by the logic structure.

Abstract: A method for the isolation of oligomeric 2, 2-difurylpropane (DTHFP) suitable for use on an industrial scale. A method can include using oligomeric 2, 2-difurylpropane, in particular, its use can be as a polar modifier for butadiene and styrene butadiene polymerisation so is to produce rubber. Utilising the material as an alternative to DTHFP in rubber production avoids subsequent leaching of the DTHFP into the environment as the oligomeric 2, 2-difurylpropane (DTHFP) gives rise to much lower levels of leaching.

Abstract: Embodiments related to fetching instructions and alternate versions achieving the same functionality as the instructions from an instruction cache included in a microprocessor are provided. In one example, a method is provided, comprising, at an example microprocessor, fetching an instruction from an instruction cache. The example method also includes hashing an address for the instruction to determine whether an alternate version of the instruction which achieves the same functionality as the instruction exists. The example method further includes, if hashing results in a determination that such an alternate version exists, aborting fetching of the instruction and retrieving and executing the alternate version.

Abstract: Guest memory data structures are read by one or more read operations which are set up to handle page faults and general protection faults generated during the read in various ways. If such a fault occurs while performing the one or more read operations, the fault is handled and the one or more read operation is terminated. The fault is handled by either dropping the fault and reporting an error instead of the fault, by dropping the fault and invoking an error handler that is set up prior to performing the read operations, or by forwarding the fault to a fault handler that is setup prior to performing the read operations. If no fault occurs, the read operations complete successfully. Thus, under normal circumstances, no fault is incurred in a read operation on guest memory data structures.

Abstract: Techniques for securely supporting a global view of system memory in a physical/virtual computer system comprising a plurality of physical/virtual CPUs are provided. In one set of embodiments, the physical/virtual computer system can receive an interrupt indicating that a first physical/virtual CPU should enter a privileged CPU operating mode. The physical/virtual computer system can further determine that none of the plurality of physical/virtual CPUs are currently in the privileged CPU operating mode. In response to this determination, the physical/virtual computer system can modify the global view of system memory to include a special memory region comprising program code to be executed while in the privileged CPU operating mode; communicate, to the other physical/virtual CPUs, a signal to enter a stop state in which execution is halted but interrupts are accepted for entering the privileged CPU operating mode; and cause the first physical/virtual CPU to enter the privileged CPU operating mode.

Abstract: A vented metal can end is provided. The can end includes a tab and a tab rivet. The can end includes an outer score and a vent score. The vent score is formed in the end wall and located beneath the nose of the tab. The vent score is positioned such that the tab rivet is located between the vent score and the center point of the end wall and the vent score is also located between the outer score and the tab rivet.

Abstract: The disclosure provides a micro-processing system operable in a hardware decoder mode and in a translation mode. In the hardware decoder mode, the hardware decoder receives and decodes non-native ISA instructions into native instructions for execution in a processing pipeline. In the translation mode, native translations of non-native ISA instructions are executed in the processing pipeline without using the hardware decoder. The system includes a code portion profile stored in hardware that changes dynamically in response to use of the hardware decoder to execute portions of non-native ISA code. The code portion profile is then used to dynamically form new native translations executable in the translation mode.

Abstract: The disclosure provides a method and a system for identifying and replacing code translations that generate spurious fault events. In one embodiment the method includes executing a first set and a second set of native instructions, performing a third translation of a target instruction to form a third set of native instructions in response to a determination that a fault occurrence is attributed to a first translation, wherein the third set of native instructions is not the same as the second set of native instructions, and the third set of native instructions is not the same as the first set of native instructions, and executing the third set of native instructions.

Abstract: An example method of emulating nested page table (NPT) mode-based execute control in a virtualized computing system includes: providing NPT mode-based execute control from a hypervisor to a virtual machine (VM) executing in the virtualized computing system; generating a plurality of shadow NPT hierarchies at the hypervisor based on an NPT mode-based execute policy obtained from the VM; configuring a processor of the virtualized computing system to exit from the VM to the hypervisor in response to an escalation from a user privilege level to a supervisor privilege level caused by guest code of the VM; and exposing a first shadow NPT hierarchy of the plurality of shadow NPT hierarchies to the processor in response to an exit from the VM to the hypervisor due to the escalation from the user privilege level to the supervisor privilege level.

Abstract: A hydrogenation catalyst, preferably palladium on a support, preferably alumina or activated charcoal support, is used in the presence of lithium salts, with salts such as the borates being preferred. This provides hydrogenation of precursors to give rise to a stereoselective, such as diastereoselective bias in the product of alkene hydrogenation using the catalyst.

Abstract: Guest memory data structures are read by one or more read operations which are set up to handle page faults and general protection faults generated during the read in various ways. If such a fault occurs while performing the one or more read operations, the fault is handled and the one or more read operation is terminated. The fault is handled by either dropping the fault and reporting an error instead of the fault, by dropping the fault and invoking an error handler that is set up prior to performing the read operations, or by forwarding the fault to a fault handler that is setup prior to performing the read operations. If no fault occurs, the read operations complete successfully. Thus, under normal circumstances, no fault is incurred in a read operation on guest memory data structures.

Abstract: Mechanisms to protect the integrity of a data structure that is traversed to locate protected memory pages are provided. Leaf nodes of the data structure store mappings that indicate which memory pages are protected. Both the pages indicated by the mappings and the pages that store the data structure are monitored by a tracing service that sends a notification to the hypervisor when a write to a traced page occurs. When system software receives such a notification, the system software traverses the data structure to determine whether any of the memory pages of the data structure is the traced page that was written to. If so, the alert action for that page is performed. If not, the system software determines whether any of the mappings in the leaf nodes include such a page and, if so, the alert action for that page is performed.

Abstract: Various embodiments of microprocessors and methods of operating a microprocessor during runahead operation are disclosed herein. One example method of operating a microprocessor includes identifying a runahead-triggering event associated with a runahead-triggering instruction and, responsive to identification of the runahead-triggering event, entering runahead operation and inserting the runahead-triggering instruction along with one or more additional instructions in a queue. The example method also includes resuming non-runahead operation of the microprocessor in response to resolution of the runahead-triggering event and re-dispatching the runahead-triggering instruction along with the one or more additional instructions from the queue to the execution logic.

Abstract: A mobile device that can optionally communicate with a server, the mobile device including latitude/longitude determining capabilities, a display, a data communication system and a power source. The mobile device can be used to communicate, provide location information, track an individual, as well as allow alerting, such in a case of an emergency. This location information could be accompanied with one or more of video information, audio information, multimedia information, and pictures taken by the mobile device. The mobile devices also allow inner-communicability among the devices such as text messaging, chat, voice communications, and the like. The capabilities of the mobile device can also be used to determine if the device has traversed a geo-fence, or defined electronic perimeter, with the crossing of the perimeter capable of triggering special functionality such as the turning on of the mobile device, or smart phone, sending an alert, altering functionality, or the like.