Abstract: Techniques and systems for generating path groups for a set of violating timing path end-points in an integrated circuit (IC) design are described. Some embodiments can determine a set of attribute values for each violating timing path end-point in a set of violating timing path end-points. Next, the embodiments can use an unsupervised machine learning clustering technique to determine a set of clusters by using the attribute values. The embodiments can then generate a path group for each cluster, wherein the path group includes violating timing path end-points that belong to the cluster.

Abstract: An automatically variable memory interleaving system which provides different interleaving factors for particular groups of memory modules dependent upon the number of operable modules present in the system. In a particular preferred embodiment, the interleaving factor is determined for the module containing the address corresponding to the applied memory address, and this interleaving factor is then used to select particular bits of the applied memory address for determining the module to be enabled and the module address.